Influence of the intrinsic layer characteristics on a-Si:H p–i–n solar cell performance analysed by means of a computer simulation

In this paper a set of one-dimensional simulations of a-Si:H p–i–n junctions under different illumination conditions and with different intrinsic layer are presented. The simulation program ASCA permits the analysis of the internal electrical behaviour of the cell allowing a comparison among the different internal configurations determined by a change in the input set. Results about the internal electric configuration will be presented and discussed outlining their influence on the current tension characteristic curve. Considerations about the drift–diffusion and the generation–recombination balance distributions, outlined by the simulation, can be used to explain the correlation between the basic device output, the i-layer characteristics (thickness and DOS), the incident radiation intensity and photon energy.     

CMS/TiO2杂化材料电流变液的制备及其性能

利用特殊的溶胶凝胶方法原位制备了改性淀粉与无机钛氧化物杂化型电流变材料。实验表明,在强电场下其电流变效应比相同组份的淀粉、二氧化钛混合型电流变液有显著提高,直流电场4 kV/mm,剪切速率5 s-1时,静态剪切屈服强度可达4000 Pa以上。同时,抗沉降性明显改善,静置100 h几乎不沉淀。此外,温度效应也获得一定的优化,在10 ℃~90 ℃的工作温度范围内力学性能保持良好,70 ℃时剪切强度达到最大值。     

A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems

In this paper, we propose a system-level design methodology for the efficient exploration of the architectural parameters of the memory sub-systems, from the energy-delay joint perspective. The aim is to find the best configuration of the memory hierarchy without performing the exhaustive analysis of the parameters space. The target system architecture includes the processor, separated instruction and data caches, the main memory, and the system buses. To achieve a fast convergence toward the near-optimal configuration, the proposed methodology adopts an iterative local-search algorithm based on the sensitivity analysis of the cost function with respect to the tuning parameters of the memory sub-system architecture. The exploration strategy is based on the Energy-Delay Product (EDP) metric taking into consideration both performance and energy constraints. The effectiveness of the proposed methodology has been demonstrated through the design space exploration of a real-world case study: the optimization of the memory hierarchy of a MicroSPARC2-based system executing the set of Mediabench benchmarks for multimedia applications. Experimental results have shown an optimization speedup of 2 orders of magnitude with respect to the full search approach, while the near-optimal system-level configuration is characterized by a distance from the optimal full search configuration in the range of 2%.     

复合形法优化内河航道重力式护岸

采用复合形优化法,结合《港口及航道护岸工程设计与施工规范》中推荐的抗滑、抗倾稳定的分项系数计算方法,并考虑了内河航道船形波等作用的影响效应,对重力式护岸断面进行了优化。     

A novel compact circuit for 4-PAM energy-efficient high speed interconnect data transmission and reception

Transmission of signals, whether on-chip or off-chip, places severe constraints on timing and extracts a large price in energy. New silicon device technologies, such as back-plane CMOS, provide a programmable and adaptable threshold voltage as an additional tool that can be used for low power design. We show that one particularly desirable use of this freedom is energy-efficient high-speed transmission across long interconnects using multi-valued encoding. Our multi-valued CMOS circuits take advantage of the threshold voltage control of the transistors, by using the signal-voltage-to-threshold-voltage span, in order to make area-efficient implementations of 4-PAM (pulse amplitude modulation) transceivers operating at high speed. In a comparison of a variety of published technologies, for signal transmission with interconnects of 10-15 mm length, we show up to 50% improvement in energy for on-chip signal transmission over binary encoding together with higher limits for operating speeds without a penalty in circuit noise margin.     

An analog circuit design environment based on cooperating blackboard systems

A novel approach to design automation for analog circuits is presented. The prototype implementation-OASE-has been realized as a set of cooperating expert systems with blackboard architecture. The circuit specific knowledge bases use hybrid representation schemes and are strictly separated from an execution engine containing the necessary control knowledge. This alleviates the knowledge acquisition process as well as the extension and maintenance of existing knowledge. OASE has been developed as a design assistant, featuring different levels of interactivity, a hierarchical design style and fully embedded algorithmic standard tools. In its current version it is able to design a broad range of different CMOS operational amplifiers.     

Fuzzy Weirstrass theorem and convex fuzzy mappings

The convexity and continuity of fuzzy mappings are defined through a linear ordering and a metric on the set of fuzzy numbers. The local-global minimum property of real-valued convex functions is extended to convex fuzzy mappings. It is proved that a strict local minimizer of a quasiconvex fuzzy mapping is also a strict global minimizer. Characterizations for convex fuzzy mappings and quasiconvex fuzzy mappings are given. In addition, the Weirstrass theorem is extended from real-valued functions to fuzzy mappings.     

Optimization by random search with jumps

We give a random optimization (RO) algorithm to optimize a real‐valued function of n real variables. During the optimization process, interpolation points are examined to follow valleys, and jumps to new starting points are executed to avoid numerous iterations in local minima. Convergence with probability one to the global minimum of a function is proved. The proposed RO method is a simple, derivative‐free and computationally moderate algorithm, with excellent performance compared to other RO methods. Seven functions, which are commonly used to test the performance of optimization methods, are used to evaluate the performance of the RO algorithm given here. Copyright © 2004 John Wiley & Sons, Ltd.     

Influence of nano-scaled dispersed second phase on substructure of deformed dispersion strengthened copper alloy

The deformation behavior of dispersion strengthened copper alloy Cu-Al2O3 was studied by TEM. The results show that nano-scaled dispersed second phase not only increases dislocation density in matrix, but also has an important influence on the dislocation substructure. The presence of fine dispersed Al2 O3 particles results in a uniform and random dislocation distribution in matrix copper and causes the difficulty in formation of dislocation cell structure and the decrease in the amount of cell structure during deformation. Deformation gives rise to much more dislocations and dislocation cells form more difficultly and the decrease in the cell size with the increase of dispersion degree.