Application of parallelized analogical planning to engineering design

Analogical planning provides a means of solving engineering problems where other machine learning methods fail. Unlike many machine learning paradigms, analogy does not require numerous previous examples or a rich domain theory. Instead, analogical planners adapt knowledge of solved problems in similar domains to the current problem. Unfortunately, the analogical planning task is an expensive one. While the process of forming correspondences between a known problem and a new problem is complex, the problem of selecting a base case for the analogy is virtually intractable.This paper addresses the issue of efficiently forming analogical plans. The Anagram planning system is described, which takes advantage of the massively parallel architecture of the Connection Machine to perform base selection and map formation. Anagram provides a tractable solution to analogical planning, with a complexity that is sublinear in the size of the plans.This paper describes the Anagram system and its parallel algorithms. The paper also presents theoretical analyses and empirical results of testing the system on a large database of plans from the domain of automatic programming.     

氨合成塔出口氨含量偏低原因分析及对策

阐述UHDE合成塔运行现状 ,分析氨净值达不到设计值的原因 ,提出相应的解决措施     

铝基印制电路板制造工艺研究

此文对一种进口铝基印制电路板的制造工艺流程进行了介绍,对所采用的制造工艺技术进行了较为详细的论述。     

对未来我国覆铜板业技术发展的战略与任务的探讨

对未来十年我国覆铜板业技术发展的战略与技术开发重点任务进行了探讨。     

一种高并行度的H.264帧内预测器的VLSI设计

分析了帧内预测的17种模式,对于每个4×4大小块的16个像素点的不同模式的预测公式之间的相同运算,采用数字强度缩减的方法去除计算的冗余,提出了一种高并行度的帧内预测器,可以每个时钟周期处理16个像素点的预测值。基于SMIC0.18μm工艺,用verilog对该设计进行了VLSI实现,综合后的电路的关键路径最大时延为10ns,电路规模不超过1.4万门,数据吞吐率可以达到1600Msamples/s。从实现结果来看,与采用可重构方法的设计相比,该设计在相同的并行度下减小了电路面积,简化了控制逻辑。     

光刻技术及其新进展

介绍了用于制作半导体集成电路的光刻工艺的概念、分类及发展过程，阐述了当前光刻工艺的主流，并重点介绍了极紫外光刻、X射线光刻、电子束光刻、离子束光刻、纳米图形转印等下一代光刻技术的特点及其面临的挑战。     

不甩线圈的多星形移相变极

对于某些槽数和极数比的多星形移相变极电机,提出与前人不同的是在两种极数下均不甩去线圈的绕组方案,使绕组利用率高,且线圈及其联接都较简单.这种绕组方案在一种极数下并联支路略有不平衡,其所引起的电机定子铜耗的增加是极其有限的,不致影响电机的正常运行.     

集成电路的现状及其发展趋势

集成电路是信息社会经济发展的基石。通过对集成电路发展规律的分析,从集成电路的设计、制造、新产品研发和市场动态等方面,描述了集成电路的最新动态;探讨了集成电路的发展趋势;指出集成电路与其它学科、技术的结合,不断形成新的研究方向;新材料、新结构、新器件不断涌现,特征尺寸继续缩小,摩尔定律仍然起作用。     

一种简易的手工网印序号工艺法

通过一种简易的手工丝印序号工艺法,可以连续完成逐张PCB的序号印制且质量稳定。     

14 kV single-phase superconducting fault current limiter based on YBCO films

We present the fabrication and short circuit test results of a 14 kV single-phase resistive superconducting fault current limiter (SFCL) based on YBa₂Cu₃O₇ (YBCO) films. Individual components were processed using the 4″ YBCO films and have the rated voltage and current of 600 V and 35 A at 77 K, respectively. Twenty four components, eight components in series and three lines in parallel, make a module having the rated voltage and current of 4.8 kV and 105 A, respectively. Three modules were assembled in series to produce the SFCL working at 77 K, a 14 kV single-phase machine for the 22.9 kV Y-Y grid. short circuit tests were successfully conducted in an accredited test facility with the maximum fault currents up to 14.1 kA_P. All components quenched together upon faults and shared the rated voltage evenly without any supplementary device between the modules. This proves that the SFCL based on YBCO films may not only work reliably at 22.9 kV, but also provide technical feasibility for higher voltage application including the transmission grids.