Effect of Ge-GeO2 co-doping on non-ohmic behaviour of TiO2-V2O5-Y2O3 varistor ceramics

An investigation was made into the effect of doping with the elemental crystal Ge or/and GeO₂ on the TiO₂-V₂O₅-Y₂O₃ varistor ceramics. The result shows that as the doping contents of V₂O₅ and Y₂O₃ are 0.5 mol%, respectively, co-doping with 0.3 mol% Ge and 0.9 mol% GeO₂ makes the highest α value (α = 12.8), the lowest breakdown voltage V_1mA (V_1mA = 15.8 V/mm) and the highest grain boundary barrier Φ_B (Φ_B = 1.48 eV), which is remarkably superior to the TiO₂-V₂O₅-Y₂O₃ varistor ceramics undoped with Ge and GeO₂ and mono-doped with Ge or GeO₂. The TiO₂-V₂O₅-Y₂O₃-Ge-GeO₂ ceramic has the prospect of becoming a novel varistor ceramic with excellent electrical properties.     

Hybrid Aging Delay Model Considering the PBTI and TDDB

With a 45 nm process technique, the shrinking silicon feature size brings in a high-k/metal gate which significantly exacerbates the positive bias temperature instability (PBTI) and time-dependent dielectric breakdown (TDDB) effects of a NMOS transistor. However, previous works presented delay models to characterize the PBTI or TDDB individually. This paper demonstrates that the delay caused by the joint effects of PBTI and TDDB widely differs from the cumulated result of the delay caused by the PBTI and TDDB, respectively, with the experiments on an inverter chain. This paper proposes a hybrid aging delay model comprising both the PBTI and TDDB effects by analyzing the relationship between the aging propagation delay and the inherent delay of the gate. Experimental results on the logic gates under 45 nm, 32 nm, 22 nm, and 16 nm CMOS technologies show that the maximum error between the proposed model and the actual value is less than 2.5%, meanwhile the average error is about 1.5%.     

一款800V VDMOS终端结构的设计

设计了一款800 V VDMOS终端结构,采用场限环(FLR)与场板(FP)相结合的方式,在场限环上添加多晶硅场板与金属场板,有效地降低了表面电场峰值。通过调整终端结构,在135μm的有效终端长度上实现了848 V的击穿电压,最大表面电场为2.34×105 V/cm,小于工业界判断器件击穿场强标准(2.5×105 V/cm),且电场分布比较均匀,终端结构的稳定性和可靠性高。     

脉冲功率电容器用PbLa(ZrTi)O_3陶瓷性能研究

采用固相反应法制备了Pb0.96La0.06(Zr1-xTix)O3陶瓷,研究了Ti含量对所制陶瓷的电性能和储能特性的影响。结果表明,PbLa(ZrTi)O3陶瓷介电常数与电场强度呈非线性变化关系。当Ti含量x为0.08时,所测电滞回线细长狭窄,并呈下凹趋势,此时极化强度为22.18×10–6 C/cm2,储能密度为1.06 J/cm3。通过流延法制备的脉冲功率电容器击穿电压可大幅度提升,储能密度达1.95 J/cm3,具有高能量转换效率。     

KSGZY—1000/6/1·2移动变电站低压保护误动作分析及处理

针对新进1#移动变电站出现的无规则及不明原因的瞬时跳闸故障,通过认真仔细的观察和查找,进行了原因分析并提出改进方案,保证了供电的安全可靠性。     

论不同地质条件下深基坑的变形破坏类型、主要岩土工程问题及其支护设计对策

本文以地貌单元、地层时代和地层组合为基本要素，根据我国广泛分布的地貌单元的时代——地层组合特点，将深基坑的地质条件划分成六种常见的、有代表性的组合类型。进而对这些不同类型地质条件下深基坑的变形破坏机制类型、其主要岩土工程问题和支护形式进行了概括。文中对“与地下水渗透破坏有关的深基坑变形破坏机制和主要岩土工程问题”作了专门论述。最后提出了深基坑工程设计的一些宏观控制念。     

漏电保护器常见故障分析

介绍了漏电保护器的分类及各类保护器的选择,从两个方面对漏电保护器的常见故障进行了分析。     

锻模损坏形式及延长其使用寿命的措施

介绍了锻模的损坏原因、损坏形式以及延长锻模使用寿命的措施。     

纳米杂化PI薄膜击穿孔区形貌及元素分布

无机纳米杂化聚酰亚胺(PI)薄膜具有优良的耐电晕特性,通过观察击穿孔区形貌研究薄膜击穿机理及纳米颗粒的作用,利用SEM观察阶梯式升压强电场击穿无机纳米杂化PI薄膜孔区形貌,能谱仪测试孔区附近元素分布.研究表明:杂化薄膜严重破坏区域仅局限在孔洞附近10～50 μm范围内,随半径增加,其表面由颗粒大小不均匀、表面粗糙不平,逐渐过渡到颗粒均匀的微观结构状态;Cu含量逐渐减少,Au含量逐渐增加,正常区域电极表面没有损伤;氧化铝纳米颗粒在杂化薄膜中起到阻止电极破坏的作用,薄膜击穿机理属热击穿类型.     

焊接与切割设备的使用和维修(五十二)--TIG焊机的使用与维修

讲述了并接电容排除WS-200钨极氩弧焊电流表减动作失灵的方法。详细分析了WSE-315氩弧焊机的原电路电流反馈和改进后的电流反馈原理;例举了WSE-500多功能脉冲钨极氩弧焊机故障排除的事例。