在协议集成测试系统上开展路由协议测试

在分析路由协议的特性及其测试需求的基础上，提出利用窗口黑盒来描述被测协议，利用多通道测试方法扩展对被测实现的控制和观察，通过扩充参考实现增强系统的测试能力。将这些理论，技术应用于系统中，对路由协议开展了有效的测试活动，为国产高性能路由器的开发提供了有力的支持，也进一步增强了PITS系统的功能和适用性。     

结合试飞特点,开展专用测试设备计量确认

根据我院专用测试设备计量确认现状及需求，对开展试飞专用测试设备计量确认工作的要求，步骤、确认原则，以及编定计量确认方法进行了必要的讨论分析。     

Model validation and model structure determination

This paper gives a tutorial overview of basic approaches for model validation and model structure determination.Work partially supported by the Swedish Research Council for Engineering Sciences under contract 98-654.     

砂基中泥浆盾构法隧道施工开挖面稳定性试验研究

 通过模型试验，对泥浆盾构施工中泥浆维持开挖面稳定的力学机理，开挖面前缘土体的应力变化规律，泥浆压力作用机理及泥皮形态进行了研究，提出了中粗砂地基中临界泥浆压力 公式。     

后压浆技术在杨凌国际会展中心基桩工程中应用效果的分析

本文叙述了杨凌国际会展中心基桩静力载荷试验的试验过程 ;通过对三根灌注桩承载力的试验结果分析 ,认为后压浆技术对提高灌注桩单桩极限承载力有很大作用     

峡口水库沥青混凝土面板的施工与试验

以灌溉、防洪为主的峡口水库大坝，为沥青混凝土面板堆石坝，为研究低温抗裂性能，对沥青混凝土面板破损取样，进行了配比和多种力学性能试验，并与原面板设计指标进行了对比。由于面板经受住了－20℃以下的低温考验，其所用沥青指标、破损取样试验结果，特别是冻断低温指标，对确定水工沥青混凝土低温抗裂检验标准有重要参考价值。     

电视机监督检验电磁兼容结果分析和对策

本文讨论了电磁兼容对电视机的技术要求和相应对策。     

Intermetallic compounds formed at the interface between liquid indium and copper substrates

The interfacial reactions between liquid In and Cu substrates at temperatures ranging from 175°C to 400°C are investigated for the applications in bonding recycled sputtering targets to their backing plates. Experimental results show that a scallop-shaped Cu₁₆In₉ intermetallic compound is found at the Cu/In interface after solder reactions at temperatures above 300°C. A double-layer structure of intermetallic compounds containing scallop-shaped Cu₁₁In₉ and continuous CuIn is observed after the Cu/In interfacial reaction at temperatures below 300°C. The growth of all these intermetallic compounds follows the parabolic law, which implies that the growth is diffusion-controlled. The activation energies for the growth of Cu₁₆In₉, Cu₁₁In₉, and CuIn intermetallic compounds calculated from the Arrhenius plot of growth reaction constants are 59.5, 16.9, and 23.5 kJ/mole, respectively.     

瞬态瑞雷面波法在软岩地层勘探中的应用

结合工程实例，介绍了在物性条件和地质条件复杂地区利用面波勘探技术解决软岩地区第四系覆盖层及其岩埋深的勘探方法。     

Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores

This paper introduces a new concept of testability called consecutive testability and proposes a design-for-testability method for making a given SoC consecutively testable based on integer linear programming problem. For a consecutively testable SoC, testing can be performed as follows. Test patterns of a core are propagated to the core inputs from test pattern sources (implemented either off-chip or on-chip) consecutively at the speed of system clock. Similarly the test responses are propagated to test response sinks (implemented either off-chip or on-chip) from the core outputs consecutively at the speed of system clock. The propagation of test patterns and responses is achieved by using interconnects and consecutive transparency properties of surrounding cores. All interconnects can be tested in a similar fashion. Therefore, it is possible to test not only logic faults but also timing faults that require consecutive application of test patterns at the speed of system clock since the consecutively testable SoC can achieve consecutive application of any test sequence at the speed of system clock.