ATSP:时态网络可视化的自适应时间片划分方法

现有的时态网络可视化方法大多采用等量时间片来可视化网络的演变，不利于时态模式的快速挖掘和发现。为此，根据时态网络固有的特征提出自适应时间片划分方法（Adaptive Time Slice Partition method，ATSP）。在时态网络的两种表示方式（基于事件的表示方式和基于快照的表示方式）的基础上，构建了ATSP的基础模型，同时提出了一种改进模型用来描述事件间隔时间服从长尾分布的时态网络。为了实现时间片的不等量划分，针对探索任务的不同提出了基于时态模式的ATSP规则和基于中心节点的ATSP规则，并提出了实现算法--层次划分算法（Hierarchical Partition algorithm，HP）和增量划分算法（Incremental Partition algorithm，IP）。实验结果表明，ATSP方法比传统的时间片划分方法更能准确地表示网络的时态特征，且该方法应用于可视化时，能有效归纳并展示网络的特征，明显提高了视觉分析的效率。     

无失效数据机载多余度EWIS可靠性研究

针对高可靠度机载多余度EWIS各组成部分寿命服从指数分布但参数未知的情况，提出采用无失效数据可靠度分析方法评估EWIS的可靠度水平。通过Monte-Carlo仿真方法对连接形式为“先并联、后串联”EWIS各组成部分寿命进行抽样，利用“最小最大值”方法获得系统寿命的抽样值，用概率纸检验法初步判断EWIS寿命是否服从威布尔分布，再用Pearson拟合优度检验法判断EWIS寿命是否服从威布尔分布。结合无故障飞行时间的样本值与EWIS寿命服从威布尔分布的假设，采用无失效数据分析方法评估EWIS的可靠度水平。研究方法对机载多余度EWIS无失效数据可靠度分析有一定的贡献。     

基于神经网络算法的井下裂缝诊断与堵漏技术

在钻井过程中，常常钻遇不同宽度的井下地层裂缝。钻遇裂缝时容易发生钻井液漏失现象，甚至发生钻井液失返现象，严重影响了安全、高效钻井。目前裂缝封堵的方法常存在封堵成功率不高、堵漏承压能力低的问题，其中一个重要的原因是对井下地层的裂缝宽度等特征认识不清。基于地层裂缝产生的岩石力学机理，确定影响裂缝宽度关键的6个力学和工程因素，并利用神经网络计算的非线性、大数据特点建立了井下地层裂缝宽度的分析模型，模型包含输入层、输出层和3个隐藏层。通过该模型诊断井下裂缝宽度，提高了计算精度，平均误差仅为2.09%，最大误差为5.88%，解决钻井现场仅凭经验判断裂缝误差较大和依靠成像测井成本较高的问题。同时根据神经网络模型诊断得到的裂缝宽度优化堵漏材料的粒径配比，提高了裂缝内的架桥封堵强度和架桥的稳定性，封堵层的承压能力达到12.8 MPa，反向承压能力达到4.5 MPa。现场堵漏试验最高憋压10 MPa，经过封堵作业后大排量循环不漏，达到了裂缝性地层高效堵漏的目的，堵漏一次成功。      

Impact of the anode operating conditions on the liquid water distribution in the cathode gas diffusion layer

Previous experimental results indicate that the humidification conditions at the anode have an impact on the liquid water distribution in the cathode gas diffusion layer. Numerical simulations are developed to reproduce and analyze this effect. Results consistent with the experimental results are first obtained by playing with the partition coefficients of an advanced pore network model computing the liquid water formation and transfer in the cathode gas diffusion layer (GDL) for a large range of operating conditions. Then, a model for the full anode – cathode assembly is developed by combining the pore network model of the cathode GDL and a 1D model describing the heat and water transfer in the various components of the anode-cathode assembly. This enables one to generalize the dry – wet regime diagram introduced in a previous work by incorporating the effect of the humidity condition at the anode.     

Engineering grain boundary anisotropy to elucidate grain growth behavior in alumina

Current grain growth models have evolved to account for the relationship between grain boundary energy/mobility anisotropy and the five degrees of grain boundary character. However, the role of grain boundary networks on overall growth kinetics remains poorly understood. To experimentally investigate this problem, a highly textured Al₂O₃ was fabricated by colloidal casting in a strong magnetic field to engineer a unique spatial distribution of grain boundary character. Microstructural evolution was quantified and compared to an untextured sample. From this comparison, a prevalence of (0001)/(0001) terminated grain boundaries with anisotropic networks were identified in the textured sample. These boundaries and their networks were found to be driving grain growth at a faster rate than predicted by models. These findings will allow better modelling of grain growth in real systems by experimentally exploring the impact thereon of grain boundary plane anisotropy and relative energy/mobility differences between neighboring boundaries.     

Super-Resolution Reconstruction of Images Based on Microarray Camera

In the field of images and imaging, super-resolution (SR) reconstruction of images is a technique that converts one or more low-resolution (LR) images into a highresolution (HR) image. The classical two types of SR methods are mainly based on applying a single image or multiple images captured by a single camera. Microarray camera has the characteristics of small size, multi views, and the possibility of applying to portable devices. It has become a research hotspot in image processing. In this paper, we propose a SR reconstruction of images based on a microarray camera for sharpening and registration processing of array images. The array images are interpolated to obtain a HR image initially followed by a convolution neural network (CNN) procedure for enhancement. The convolution layers of our convolution neural network are 3×3 or 1×1 layers, of which the 1×1 layers are used to improve the network performance particularly. A bottleneck structure is applied to reduce the parameter numbers of the nonlinear mapping and to improve the nonlinear capability of the whole network. Finally, we use a 3×3 deconvolution layer to significantly reduce the number of parameters compared to the deconvolution layer of FSRCNN-s. The experiments show that the proposed method can not only ameliorate effectively the texture quality of the target image based on the array images information, but also further enhance the quality of the initial high resolution image by the improved CNN.     

面向电信承载网的监控系统设计与实现

面对电信承载网连接的日益增长的海量终端设备，运营商需要结合网络拓扑对终端设备产生的数据进行高效的汇聚统计、异常分析、故障定位处理等操作。针对已有系统存在的操作困难、分析效率低等问题，设计与实现了一个面向电信承载网的高效监控系统，提供实时与离线数据分析和多维可视化分析的能力。对网管、认证、终端等系统及设备采集的数据进行结构化存储，对采集的数据进行拓扑相关性和时间序列方法分析，根据分析结果实现基于动态阈值控制的异常实时告警、定位等操作，并提供多维度可视化分析对网络状态进行实时监控。实际应用结果表明，该系统性能优异，具有良好交互性，能较好地满足承载网运维人员业务分析需求。     

基于关键路径延时检测的自适应电压缩减技术

为了减小传统的最差情况设计方法引入的电压裕量,提出了一种变化可知的自适应电压缩减(AVS)技术,通过调整电源电压来降低电路功耗.自适应电压缩减技术基于检测关键路径的延时变化,基于此设计了一款预错误原位延时检测电路,可以检测关键路径延时并输出预错误信号,进而控制单元可根据反馈回的预错误信号的个数调整系统电压.本芯片采用SMIC180 nm工艺设计验证,仿真分析表明,采用自适应电压缩减技术后,4个目标验证电路分别节省功耗12.4％,11.3％,10.4％和11.6％.     

High-voltage and low specific on-resistance power UMOSFET using P and N type columns

For the first time, we present the unique features exhibited by power 4H–SiC UMOSFET in which N and P type columns (NPC) in the drift region are incorporated to improve the breakdown voltage, the specific on-resistance, and the total lateral cell pitch. The P-type column creates a potential barrier in the drift region of the proposed structure for increasing the breakdown voltage and the N-type column reduces the specific on-resistance. Also, the JFET effects reduce and so the total lateral cell pitch will decrease. In the NPC-UMOSFET, the electric field crowding reduces due to the created potential barrier by the NPC regions and causes more uniform electric field distribution in the structure. Using two dimensional simulations, the breakdown voltage and the specific on-resistance of the proposed structure are investigated for the columns parameters in comparison with a conventional UMOSFET (C-UMOSFET) and an accumulation layer UMOSFET (AL-UMOSFET) structures. For the NPC-UMOSFET with 10 µm drift region length the maximum breakdown voltage of 1274 V is obtained, while at the same drift region length, the maximum breakdown voltages of the C-UMOSFET and the AL-UMOSFET structures are 534 and 703 V, respectively. Moreover, the proposed structure exhibits a superior specific on-resistance (R_on,sp) of 2 mΩ cm², which shows that the on-resistance of the optimized NPC-UMOSFET are decreased by 56% and 58% in comparison with the C-UMOSFET and the AL-UMOSFET, respectively.