A second-order extension of the edge-selection algorithm for a ΣΔ-DAC architecture insensitive to oversampling clock jitter

In this paper we propose a ΣΔ-digital-to-analogue converter (DAC) architecture using a clock from an all-digital fractional programmable clock generator as an oversampling clock. Although this method is attractive in respect of implementation issues, it has not been widely used because the clock generated by this method contains a significant amount of jitter. The proposed architecture uses an edge-selection algorithm to suppress the in-band noise caused by the oversampling clock jitter. The improvement of the algorithm over the previous work is mainly achieved by adopting a second-order four-way edge selection. Simulation results show that the improved algorithm achieves a signal-to-noise distortion ratio of around 100 dB when applied to a 1-bit ΣΔ-DAC for a voiceband codec and that the performance degradation due to the clock jitter has been kept within 3 dB.     

基于StrongARM SA1100的嵌入式系统中触摸屏驱动设计

触摸屏控制器简化了对触摸屏的控制,但他采用串行通信,这样触摸屏控制器的转换精度越高,从他读出触摸点坐标值所花的时间就越多。为了减少这种时间,以一个基于StrongARM SA1100的嵌入式系统应用实例介绍了一种典型的电阻式触摸屏并行通信硬件驱动电路以及在此基础上的软件驱动程序设计方法和流程。有利于操作系统对触摸屏的控制。     

基于0.18 μm CMOS工艺的超高速比较器

给出了基于TSMC 0．18μm CMOS工艺的1．8V超高速比较器的设计方案；对比较器速度和失调进行综合，设计了一个1GHz超高速低失调比较器；通过Monte Carlo仿真，验证该比较器的失调电压分布范围为-4．5～4．5mV，并进行了版图设计。该比较器应用于低电压A／D转换器设计中，可达到6位以上的精度。     

一种临界导电模式的功率因数校正电路

使用有源功率因数校正技术可有效抑制电网电流谐波和提高开关电源功率因数。文中分析了临界导电模式Boost型功率因数校正电路的电路结构及其工作原理,应用反馈控制理论,研究了功率因数校正环节的控制特性,给出了其电路参数的设计方法,保证在电网电压和负载功率大范围变化时,功率因数维持在0.99 以上。     

TD-LTE多带宽数字下变频设计与FPGA实现

分时长期演进( TD-LTE )系统为了满足各种环境的需要,支持6种不同的带宽和基带速率。为了满足TD-LTE系统多带宽和多速率的要求,设计了一种兼容TD-LTE多带宽和多速率的多带宽数字下变频方案。方案中采用了时分复用技术、抽取滤波的合理搭配和高性能滤波器实现了资源优化和输出信号的高信噪比。此外,对数字混频器和抗混叠滤波器进行改进,设计出了基于坐标旋转数字计算法( CORDIC)的流水线型混频器和高速并行可配置滤波器。软件仿真和硬件测试证明了TD-LTE多带宽数字下变频的正确性,且具有灵活性、高性能和低资源消耗的特点以及较高的工程实用价值。     

A dead-time minimization algorithm for improving the output characteristics of the PWM inverter

The dead time in an inverter is necessary to prevent the short circuit of the DC source. However, the dead time may cause serious problems such as waveform distortion, voltage drop, increased torque ripple and heating of the motors. In this paper, a dead-time minimization algorithm is proposed for improving the inverter output performance. The adverse effects of the dead time are investigated, focusing on the voltage drop and the distortion factor of inverter output current. The proposed algorithm consists of forbidding unnecessary triggers for the inverter switches that are not turned on although the gate drive signal is impressed. The proposed algorithm is explained in terms of the conduction modes of the output currents. The validity of the proposed method is verified by comparing the simulated and experimental results with those of the conventional methods. It is concluded from the results that the proposed algorithm can reduce the output current harmonics. Further, the output voltage can be equal to the reference value and the number of inverter switchings can also be reduced to 50% compared with those of conventional methods.     

基于电流型控制的LED恒流源分析与设计

设计了一种输出功率约50W的LED恒流源驱动模块, 其负载为由多只LED管(每只功率为1W)采用混联方式组成的LED阵列。通过对其电流型反激式变换及恒流控制电路的设计与试制, 并在不同输入电压下, 改变负载测试, 可看出其电流变化规律基本相似。随着负载变小, 输出电压升高, 输出电流逐渐减小, 输出电流稳定度达4.6%。在一定负载时, 输出电压值保持在47.2V左右, 电压纹波峰-峰值约为400mV。电流波动约0.05A, 输出电流稳定可靠, 可用于对多只串并混联的LED阵列驱动供电。     

A novel amplitude-to-phase converter for sine/cosine position transducers

Resolvers and various other types of sine/cosine encoders are used for both angular and linear position sensing. These devices provide analogue signals in the form of the sine and the cosine of an angle?θ?related to the position of the moving part of the transducer. A novel converter is described for the linearization of the sensor signals. The scheme converts the co-sinusoids into a nearly perfect triangular signal from which?θ?is determined using simple linear equation. The proposed converter makes use of the alternating pseudo-linear segments of the sensor signals, together with a dedicated and simple linearization technique to further improve the linearity of these segments. This enables unambiguous determination of?θ?over the full 360 degree range, with an absolute error of non-linearity of 0.041 degree. The conversion technique may be implemented numerically or electronically. The proposed converter was built using basic analogue electronic circuitry, and was successfully tested using both an electronic transducer model and a commercial resolver. The principle and theory of operation, computer simulation, and experimental results are given.     

Multiple output zero-current switching switched-capacitor bidirectional dc–dc converter

The proposed circuit is a multiple output quasi-resonant (QR) zero-current switching (ZCS) switched-capacitor (SC) converter with a bidirectional power flow control conversion scheme. The principles of the proposed multiple output QR ZCS SC bidirectional dc–dc converter are described using a detailed circuit model for analysis. Simulation and experimental results are carried out to verify the validity and the soft switching performance of the proposed converter. The maximum efficiency achievable is about 94 and 92% for the forward and reverse power flow control schemes, respectively. The output voltage can be regulated by changing the switching frequency for the designed compensated closed-loop controller.