硅基波导、光探测器和CMOS电路的集成

对于集成光学器件和微电子电路制作，应用了驻波监控指示技术（ＳＷＡＭＩ）、局部氧化技术（ＬＯＣＯＳ）、光波导和探测器的平接、漏波，以及镜耦合技术。文章介绍了硅基光波导、光探测器和ＣＭＯＳ电路的单片集成技术。讨论了集成工艺以及静态和动态测量结果     

以非晶硅为硬掩膜的TaN金属栅的选择性湿法腐蚀

提出了一种在HfSiON介质上,采用非晶硅为硬掩膜的选择性去除TaN的湿法腐蚀工艺。由于SC1(NH4OH:H2O2:H2O)对金属栅具有合适的腐蚀速率且对硬掩膜和高K材料的选择比很高,所以选择它作为TaN的腐蚀溶液。与光刻胶掩膜和TEOS硬掩膜相比,因非晶硅硬掩膜不受SC1溶液的影响且很容易用NH4OH溶液去除（NH4OH溶液对TaN和HfSiON薄膜无损伤）,所以对于在HfSiON介质上实现TaN的选择性去除来说非晶硅硬掩膜是更好的选择。另外,在TaN金属栅湿法腐蚀和硬掩膜去除后, 高K介质的表面是光滑的,这可防止器件性能退化。因此,采用非晶硅为硬掩膜的TaN湿法腐蚀工艺可以应用于双金属栅集成,实现先淀积的TaN金属栅的选择性去除。     

论光发射器件研究与发展方向

提出了半导体光发射器件发展的五大方向,即单纵模、高速率、大功率、可见光和光电子集成技术。指明了现阶段研究重点及今后研究方向和奋斗目标。     

数字教育技术在民族声乐教学中的应用

数字技术的快速发展,以及其在民族声乐教学中的应用,为改变传统民族声乐教学方法,提高教学水平提供了很大的便利。将民族声乐教学与数字教育技术进行结合,能够确保民族声乐教学内容更加丰富、形象更加多样、教学更加具体,进而能够有效提高民族声乐教学的教学质量。     

台达电梯一体机IED电梯一体化控制系统设计

以台达电梯一体机IED电梯一体化控制系统为例,介绍控制系统的设计。结合电梯的基本原理,进行了一体化控制系统的功能规划和硬件电路设计。     

A Parallel-Based Lifting Algorithm and VLSI architecture for DWT

A novel Parallel-Based Lifting Algorithm （PBLA） for Discrete Wavelet Transform （DWT）, exploiting the parallelism of arithmetic operations in all lifting steps, is proposed in this paper. It leads to reduce the critical path latency of computation, and to reduce the complexity of hardware implementation as well. The detailed derivation on the proposed algorithm, as well as the resulting Very Large Scale Integration （VLSI） architecture, is introduced, taking the 9/7 DWT as an example but without loss of generality. In comparison with the Conventional Lifting Algorithm Based Implementation （CLABI）, the critical path latency of the proposed architecture is reduced by more than half from （4Tm ＋ 8Ta）to Tm ＋ 4Ta, and is competitive to that of Convolution-Based Implementation （CBI）, but the new implementation will save significantly in hardware. The experimental results demonstrate that the proposed architecture has good performance in both increasing working frequency and reducing area.     

Towards neuromorphic electronics: Memristors on foldable silicon fabric

The advantages associated with neuromorphic computation are rich areas of complex research. We address the fabrication challenge of building neuromorphic devices on structurally foldable platform with high integration density. We present a CMOS compatible fabrication process to demonstrate for the first time memristive devices fabricated on bulk monocrystalline silicon (100) which is next transformed into a flexible thin sheet of silicon fabric with all the pre-fabricated devices. This process preserves the ultra-high integration density advantage unachievable on other flexible substrates. In addition, the memristive devices are of the size of a motor neuron and the flexible/folded architectural form factor is critical to match brain cortex׳s folded pattern for ultra-compact design.     

基于云计算的视频监控和资源整合优化系统

视频监控系统在日常生活中担当着越来越重要的作用,将云计算技术应用于视频监控系统中,以此构建了基于云计算的视频监控和资源整合优化系统;然后,改进了视频监控中的一个重要的算法—动态目标检测算法,以提高视频监控的准确性;最后,研究了如何对于云计算平台中的服务器资源进行整合优化,并对所实现的系统进行了测试,结果表明,该系统可以提高视频监控的准确性和服务器的响应时间.     

基于GIS的城市规划信息管理系统研究

我国正迈入快速城市化建设过程中,运用GIS技术手段来解决城市规划过程中的城市化建设进程信息整合管理,对于提高城市规划信息整合效率、避免重复建设、重叠规划、一库多建等城市规划问题有着积极意义。     

CMOS compatible dual metal gate integration with successful Vth adjustment on high-k HfTaON by high-temperature metal intermixing

In this paper, we report for the first time a novel dual metal gate (MG) integration process for gate-first CMOS platform by utilizing the intermixing (InM) of laminated ultra-thin metal layers during high-temperature annealing at 1000 °C. In this process, an ultra-thin (2 nm) TaN film is first deposited on gate dielectric as a buffer layer. Preferable laminated metal stacks for NMOS and PMOS are then formed on a same wafer through a selective wet-etching process in which the gate dielectric is protected by the TaN buffer layer. Dual work function for CMOS can finally be achieved by the intermixing of the laminated metal films during the S/D activation annealing. To demonstrate this process, prototype metal stacks of TaN/Tb/TaN (NMOS) and TaN/Ti/HfN (PMOS) has been integrated on a single wafer, with WF of 4.15 and 4.72 eV achieved, respectively. Threshold voltage (V_th) adjustment and transistor characteristics on high-k HfTaON dielectric are also studied.