欧洲无线DSL的发展现状及市场前景

对欧洲的立法者来说，目前最为关注的课题之一便是如何解决数字鸿沟这一困扰欧洲大陆信息与通信技术整体发展水平的矛盾。向人们提供高速因特网接入服务是消除数字鸿沟的有效手段，而无线数字用户线技术以及其成低、通信质量好、覆盖范围大及灵活性等优势成为宽带接入技术中的佼佼者，并获得很多欧洲国家电信运营商的青睐。     

液压集成块校核软件的编制和应用

本文叙述了液压集成块校核软件的编制思想和方法，并重点介绍了编制过程中所使用的相关技术，同时给出部分源程序。     

An EM‐based adaptive multiple target tracking filter

Tracking targets of interest is one of the major research areas in radar surveillance systems. We formulate the problem as incomplete data estimation and apply EM to the MAP estimate. The resulting filter has a recursive structure analogous to the Kalman filter. The advantage is that the measurement‐update deals with multiple measurements in parallel and the parameter‐update estimates the system parameters on the fly. Experiments tracking separate targets in parallel show that tracking maintenance ratio of the proposed system is better than that of NNF and RMS position error is smaller than that of PDAF. Also, the system parameters are correctly obtained even from incorrect initial values. Copyright © 2001 John Wiley & Sons, Ltd.     

CDMA通信系统的MATLAB仿真

在简要介绍MATLAB语言的基础上，对使用MATLAB语方仿真的CDMA通信系统进行描述。     

Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores

This paper introduces a new concept of testability called consecutive testability and proposes a design-for-testability method for making a given SoC consecutively testable based on integer linear programming problem. For a consecutively testable SoC, testing can be performed as follows. Test patterns of a core are propagated to the core inputs from test pattern sources (implemented either off-chip or on-chip) consecutively at the speed of system clock. Similarly the test responses are propagated to test response sinks (implemented either off-chip or on-chip) from the core outputs consecutively at the speed of system clock. The propagation of test patterns and responses is achieved by using interconnects and consecutive transparency properties of surrounding cores. All interconnects can be tested in a similar fashion. Therefore, it is possible to test not only logic faults but also timing faults that require consecutive application of test patterns at the speed of system clock since the consecutively testable SoC can achieve consecutive application of any test sequence at the speed of system clock.     

CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CAS-BUS that solves some of the new problems the test industry has to deal with. This TAM is scalable, flexible and dynamically reconfigurable. The CAS-BUS architecture is compatible with the IEEE P1500 standard proposal in its current state of development, and is controlled by Boundary Scan features.This basic CAS-BUS architecture has been extended with two independent variants. The first extension has been designed in order to manage SoC made up with both wrapped cores and non wrapped cores with Boundray Scan features. The second deals with a test pin expansion method in order to solve the I/O bandwidth problem. The proposed solution is based on a new compression/decompression mechanism which provides significant results in case of non correlated test patterns processing. This solution avoids TAM performance degradation.These test architectures are based on the CAS-BUS TAM and allow trade-offs to optimize both test time and area overhead. A tool-box environment is provided, in order to automatically generate the needed component to build the chosen SoC test architecture.     

MIMO系统中简单的扩展空时块编码分集技术研究

本文提出一种多输入多输出（MIMO）天线系统中简单的扩展空时块编码（SSTBC）分集技术，采用沃尔什码来区分各天线发送数据子流。采用这种方法，在系统带宽一定时，不降低发送信息速率，同时接收机简单。不同天线的发送信息经过了所有收一发天线对之间的空间子信道，获得了所有路径的部分空间分集增益，仿真结果表明，这种增益的获得不受限于接收分集阶数，并且随发射天线的增加以一定的线性关系增加。     

射频识别模块SMC51489在门禁系统中的应用

射频识别系统一般由三部分组成:电子标签(射频卡)、读取器和天线.正确快速的识别电子标签的标签号码,是门禁系统发挥其功能的先决条件.以无源低频射频卡识别模块SMC51489为例,介绍了对射频卡信息读取的原理和方法,并给出了相应的软件编程.实验证明该模块不仅具有较大的读卡距离,而且工作可靠.     

Development of a fuzzy decision model for manufacturability evaluation

A manufacturability evaluation decision model is formulated and analyzed based on fuzzy logic and multiple attribute decision-making under the concurrent engineering environment. The study emphasizes on the treatment of the linguistic and vagueness at the early product development stage. The study also considers the function integration of the total life cycle of a product. Hence, the integrated decision model covers the multi-level, multi-goal requirements of the products. Multiple criteria such as the goal space, the decision space, the function space, the development (i.e., product & process design) space, and the activity space, are then applied under different analysis of decision-making methods. For instances, the fuzzy multiple attribute decision-making (FMADM) combined with activity-based costing (ABC) can be used in the activity decision space. The fuzzy logic decision model can be applied in the goal decision space. The results of this study point out the importance of early decision making capability. An example of a high-pressure vessel is provided to demonstrate the proposed model for evaluating the manufacturability.     

面向WLAN的MPC852T嵌入式系统设计

MPC852T是Motorola新近推出的MPC866/MPC859T家族中面向低端的一款通信处理器.嵌入式Linux由于其费用低廉及开放源码而具有广阔的发展前景.文中在分析了MPC852T通信处理器和嵌入式Linux操作系统的基础上,将二者结合给出了一种嵌入式硬件系统的设计与实现,以及该硬件系统在无线局域网WLAN中的一种应用.实践证明,该硬件系统具有性能稳定、廉价、可扩展性强、适用面广等优点.