a-Si:H薄膜的再结晶技术及Si膜的Raman光谱分析

论述了非晶硅薄膜的几种主要再结晶技术,着重指出了各种晶化技术已取得的研究成果、优缺点、有待进一步研究的内容及其在多晶硅薄膜太阳电池工业生产中的应用前景.另外,还讨论了通过Raman光谱求纳晶硅薄膜的晶粒尺寸和结晶度的方法.     

High air stability of threshold voltage on gate bias stress in pentacene TFTs with a hydroxyl-free and amorphous fluoropolymer as gate insulators

We investigated the air stabilities of threshold voltages (V_th) on gate bias stress in pentacene thin-film transistors (TFTs) with a hydroxyl-free and amorphous fluoropolymer as gate insulators. The 40-nm-thick thin films of spin-coated fluoropolymer had excellent electrical insulating properties, and the pentacene TFTs exhibited negligible current hysteresis, low leakage current, a field-effect mobility of 0.45 cm²/Vs and an on/off current ratio of 3 × 10⁷ when it was operated at −20 V in ambient air. After a gate bias stress of 10⁴ s, a small V_th shift below 1.1 V was obtained despite non-passivation of the pentacene layer. We have discussed that the excellent air stability of V_th was attributed to the insulator surface without hydroxyl groups.     

ZnO Thin Film, Device, and Circuit Fabrication using Low-Temperature PECVD Processes

We report undoped ZnO films deposited at low temperature (200°C) using plasma-enhanced chemical vapor deposition (PECVD). ZnO thin-film transistors (TFTs) fabricated using ZnO and Al₂O₃ deposited in situ by PECVD with moderate gate leakage show a field-effect mobility of 10 cm²/V s, threshold voltage of 7.5 V, subthreshold slope <1 V/dec, and current on/off ratios >10⁴. Inverter circuits fabricated using these ZnO TFTs show peak gain magnitude (dV _out/dV _in) ~5. These devices appear to be strongly limited by interface states and reducing the gate leakage results in TFTs with lower mobility. For example, ZnO TFTs fabricated with low-leakage Al₂O₃ have mobility near 0.05 cm²/V s, and five-stage ring-oscillator integrated circuits fabricated using these TFTs have a 1.2 kHz oscillation frequency at 60 V, likely limited by interface states.     

SolidWorks软件的薄膜蒸发器虚拟装配

以三维参数化造型软件SolidWorks2005为绘图支撑软件,结合Visual Basic6.0对SolidWorks2005进行二次开发,实现薄膜蒸发器的虚拟装配设计.通过建立薄膜蒸发器的装配模型、装配顺序及装配路径,配合约束关系并对过程装配进行干涉检查,确保薄膜蒸发器虚拟装配过程的高效性和可靠性.薄膜蒸发器虚拟装配设计的开发对缩短产品开发周期、提高产品设计质量、优化产品结构设计具有显著意义.     

利用可视基因膜芯片技术与实时荧光定量聚合酶链式反应技术分析肉制品中动物源性成分

为调查了解肉制品中动物源性成分,以帮助判别掺假情况,应用可视基因膜芯片检测技术对市售的肉松、香肠、肉卷、预制调理肉、肉干及肉脯等23份样品动物源性成分进行筛查分析,同时,针对筛查结果采用实时荧光定量聚合酶链式反应（polymerase chain reaction,PCR）法进一步确证。结果表明：可视基因膜芯片检测法与实时荧光定量PCR法检测结果一致,提高了未知样品的筛查效率;在本次随机分析的样品中,动物源性成分检测结果与标签标示不一致的情况占比高达21.7%,肉制品掺假虚标情况不容忽视。     

High-performance 2,9-DPh-DNTT organic thin-film transistor by weak epitaxy growth method

2,9-DPh-DNTT, an isomeric of diphenyl-dinaphtho[2,3-b:2′,3′-f]-thieno[3,2-b] thiophene (DPh-DNTTs), is an emerging candidate of high mobility organic semiconductor material. In this work, a high performance 2,9-DPh-DNTT organic thin-film transistor (OTFT) is fabricated by the method of weak epitaxy growth. The quality of 2,9-DPh-DNTT thin film was significantly improved when its epitaxial layer grows on an inducing layer of para-sexiphenyl (p-6P). Continuous large-area, highly ordered and terraced 2,9-DPh-DNTT polycrystalline thin films are obtained. The hole mobility of as-fabricated 2,9-DPh-DNTT thin-film transistor reaches up to 6.4 cm² V⁻¹s⁻¹. This simple process of preparing high mobility 2,9-DPh-DNTT thin-film transistor supplies a facile route of large-area OTFT fabrication.     

Temperature-dependent ambipolar electrical characteristics of pentacene-based thin-film transistors: The impact of opposite-sign charge carriers

The temperature-dependent electrical and charge transport characteristics of pentacene-based ambipolar thin-film transistors (TFTs) were investigated at temperatures ranging from 77 K to 300 K. At room temperature (RT), the pentacene-based TFTs exhibit balanced and high charge mobility with electron (μ_e) and hole (μ_h) mobilities, both at about 1.6 cm²/V s. However, at lower temperatures, higher switch-on voltage of n-channel operations, almost absent n-channel characteristics, and strong temperature dependence of μ_e indicated that electrons were more difficult to release from opposite-signed carriers than that of holes. We observed that μ_e and μ_h both followed an Arrhenius-type temperature dependence and exhibited two regimes with a transition temperature at approximately 210–230 K. At high temperatures, data were explained by a model in which charge transport was limited by a dual-carrier release and recombination process, which is an electric field-assisted thermal-activated procedure. At T < 210 K, the observed activation energy is in agreement with unipolar pentacene-based TFTs, suggesting a common multiple trapping and release process-dominated mechanism. Different temperature-induced characteristics between n- and p-channel operations are outlined, thereby providing important insights into the complexity of observing efficient electron transport in comparison with the hole of ambipolar TFTs.     

Synergistic Improvement of Long-Term Plasticity in Photonic Synapses Using Ferroelectric Polarization in Hafnia-Based Oxide-Semiconductor Transistors

A number of synapse devices have been intensively studied for the neuromorphic system which is the next-generation energy-efficient computing method. Among these various types of synapse devices, photonic synapse devices recently attracted significant attention. In particular, the photonic synapse devices using persistent photoconductivity (PPC) phenomena in oxide semiconductors are receiving much attention due to the similarity between relaxation characteristics of PPC phenomena and Ca²⁺ dynamics of biological synapses. However, these devices have limitations in its controllability of the relaxation characteristics of PPC behaviors. To utilize the oxide semiconductor as photonic synapse devices, relaxation behavior needs to be accurately controlled. In this study, a photonic synapse device with controlled relaxation characteristics by using an oxide semiconductor and a ferroelectric layer is demonstrated. This device exploits the PPC characteristics to demonstrate synaptic functions including short-term plasticity, paired-pulse facilitation (PPF), and long-term plasticity (LTP). The relaxation properties are controlled by the polarization of the ferroelectric layer, and this polarization is used to control the amount by which the conductance levels increase during PPF operation and to enhance LTP characteristics. This study provides an important step toward the development of photonic synapses with tunable synaptic functions.