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991.
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针对分布式驱动电动汽车直驱轮毂电机系统电流、转速传感器故障问题,研究传感器鲁棒故障检测与定位方法。考虑电机模型中含有未知输入和噪声,通过系统降阶的方式对未知输入进行解耦,采用卡尔曼滤波器(Kalman filter,简称KF)滤除解耦后子系统的白噪声,并设计最优未知输入观测器(unknown input observer,简称UIO)实现系统状态估计,得到了一种较强鲁棒性的残差产生器。采用极大似然比(generalized likelihood ratio,简称GLR)的方法评估残差信号并确定阈值,提出了一种传感器故障定位方法。台架实验结果表明,提出的基于最优UIO的传感器故障诊断方法能够实现电动汽车直驱电机系统传感器故障辨识与定位。 相似文献
993.
针对永磁同步电机失磁故障导致牵引系统带负载能力降低的问题,提出一种基于磁链在线检测容错预测控制算法。首先,根据永磁同步电机预测控制模型,详细分析了永磁体发生失磁故障对电流控制和电机运行状态的影响。其次,设计了基于滑模变结构的观测器,利用滑模变结构等值控制原理,建立了实时估计永磁体磁链算式。通过永磁体磁链算式,进而计算状态电流观测值。最后,提出了容错预测控制算法。该算法将状态电流观测值作为反馈量输入到容错预测控制器中,以使响应电流准确跟踪给定电流,从而达到容错控制的目的。通过仿真及实验验证,证明了所提算法的可行性和有效性。 相似文献
994.
《IEEJ Transactions on Electrical and Electronic Engineering》2017,12(2):169-175
A new method for the diagnosis of incipient transformer faults based on a combined decision model using IEC 60599 three‐ratio method, grey system theory (GS) algorithm, Dempster–Shafer evidence (DS) theory, and backpropagation (BP) neural network diagnosis method is proposed in this paper. The new method will eliminate the influence of any one individual diagnosis method due to insufficient information or diagnostic prejudices. In order to minimize the sum‐of‐squared errors of the proposed method, the optimal weights of every individual method which comprises the combined decision model are calculated based on their own diagnosis error ratios. Thus a combined decision model based on optimal weights (CDMOW) is formed. Then the optimal diagnosis result is obtained based on CDMOW. Results of diagnosis instances show that the use of CDMOW not only gives a much higher diagnostic accuracy rate but also more stability in fault diagnosis than any single method composing it. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. 相似文献
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结合驱动桥运行时的实际情况,通过分析随机共振原理,给出了一种自适应随机共振算法.该算法能够根据输入信号自动调节系统参数,使其达到共振从而提取淹没在强背景噪声下的有用信号特征.通过仿真实验验证了该自适应算法能够从强背景噪声中提取一个和多个频率的信号.将该自适应算法应用于驱动桥故障检测中,结果表明该算法能够区分和识别驱动桥存在的不同故障类型. 相似文献
997.
Ahcène Bounceur Salvador Mir Emmanuel Simeu Luis Rolíndez 《Journal of Electronic Testing》2007,23(6):471-484
The estimation of test metrics such as defect level, test yield or yield loss is important in order to quantify the quality
and cost of a test approach. For design-for-test purposes, this is important in order to select the best test measurements
but this must be done at the design stage, before production test data is made available. In the analogue domain, previous
works have considered the estimation of these metrics for the case of single faults, either catastrophic or parametric. The
consideration of single parametric faults is sensitive for a production test technique if the design is robust. However, in
the case that production test limits are tight, test escapes resulting from multiple parametric deviations may become important.
In addition, aging mechanisms result in field failures that are often caused by multiple parametric deviations. In this paper,
we will consider the estimation of analogue test metrics under the presence of multiple parametric deviations (or process
deviations) and under the presence of faults. A statistical model of a circuit is used for setting test limits under process
deviations as a trade-off between test metrics calculated at the design stage. This model is obtained from a Monte Carlo circuit
simulation, assuming Gaussian probability density functions (PDFs) for the parameter and performance deviations. After setting
the test limits considering process deviations, the test metrics are calculated under the presence of catastrophic and parametric
single faults for different potential test measurements. We will illustrate the technique for the case of a fully differential
operational amplifier, proving the validity in the case of this circuit of the Gaussian PDF.
Ahcène Bounceur received the Engineer degree in Operations Research from the Bejaia University (Algeria) in 2002, the Ms.C. degree in Operations Research, Combinatorial and Optimization from the école Nationale Supérieure d’Informatique et de Mathématiques Appliquées de Grenoble (ENSIMAG), Grenoble (France) in 2003 and the Ph.D. degree in Micro and nano electronics from Institut National Polytechnique de Grenoble in 2007. Currently, he is a Post-Doc Student at TIMA Laboratory, Grenoble. His current research interests are development of CAT tools for analogue and mixed-signal testing. He is a member of the IEEE. Salvador Mir has an Industrial Engineering (Electrical, 1987) degree from the Polytechnic University of Catalonia, Barcelona, Spain, and M.Sc. (1989) and Ph.D. (1993) degrees in Computer Science from the University of Manchester, UK. He is a researcher of Centre National de la Recherche Scientifique, France, and he is leading the RMS (Reliable Mixed-signal Systems) Group at TIMA Laboratory in Grenoble. He is the author of many research papers and editor of two books on silicon microsystems. His research interests include analogue, mixedsignal, RF and microsystem design and test, and applications of Artificial Intelligence to Computer-Aided Design. Emmanuel Simeu received Electrical Engineering degree from Hassania School of Engineering Sciences of Casablanca in 1987, DEA and PhD in Automatic Control and Theory of Systems from National Polytechnic Institute of Grenoble (INPG) in 1988 and 1992 respectively. He receives DHDR in Physic Science from Joseph Fourier University of Grenoble in 2005. Prior to joining TIMA Laboratory, Dr. Simeu was an associate professor in ISAR Valence and researcher in LAG from 1992 to 1995. He is currently an Associate Professor of Automatic Control and Reliability Analysis at Joseph Fourier University of Grenoble and researcher in the RMS Group of TIMA Laboratory. His research interests include complex system modelling, embedded diagnosis and monitoring of analogue, digital and mixed-signal systems and reliability analysis for integrated systems. Luis Rolíndez has a M.Sc. (2003) degree in Electrical Engineering from the University of Zaragoza, Spain, and a Ph.D. (2007) degree in Microelectronics from the National Polytechnic Institute ofGrenoble, France.He is now with STMicroelectronics (Central CAD & Design Solutions) at Crolles, France, as an analogue and mixed-signal designer. His research interests include analogue integrated circuit design, analogue and mixed-signal BIST techniques, simulation of highly integrated mixed-signal SoC and silicon debug. 相似文献
Luis RolíndezEmail: |
Ahcène Bounceur received the Engineer degree in Operations Research from the Bejaia University (Algeria) in 2002, the Ms.C. degree in Operations Research, Combinatorial and Optimization from the école Nationale Supérieure d’Informatique et de Mathématiques Appliquées de Grenoble (ENSIMAG), Grenoble (France) in 2003 and the Ph.D. degree in Micro and nano electronics from Institut National Polytechnique de Grenoble in 2007. Currently, he is a Post-Doc Student at TIMA Laboratory, Grenoble. His current research interests are development of CAT tools for analogue and mixed-signal testing. He is a member of the IEEE. Salvador Mir has an Industrial Engineering (Electrical, 1987) degree from the Polytechnic University of Catalonia, Barcelona, Spain, and M.Sc. (1989) and Ph.D. (1993) degrees in Computer Science from the University of Manchester, UK. He is a researcher of Centre National de la Recherche Scientifique, France, and he is leading the RMS (Reliable Mixed-signal Systems) Group at TIMA Laboratory in Grenoble. He is the author of many research papers and editor of two books on silicon microsystems. His research interests include analogue, mixedsignal, RF and microsystem design and test, and applications of Artificial Intelligence to Computer-Aided Design. Emmanuel Simeu received Electrical Engineering degree from Hassania School of Engineering Sciences of Casablanca in 1987, DEA and PhD in Automatic Control and Theory of Systems from National Polytechnic Institute of Grenoble (INPG) in 1988 and 1992 respectively. He receives DHDR in Physic Science from Joseph Fourier University of Grenoble in 2005. Prior to joining TIMA Laboratory, Dr. Simeu was an associate professor in ISAR Valence and researcher in LAG from 1992 to 1995. He is currently an Associate Professor of Automatic Control and Reliability Analysis at Joseph Fourier University of Grenoble and researcher in the RMS Group of TIMA Laboratory. His research interests include complex system modelling, embedded diagnosis and monitoring of analogue, digital and mixed-signal systems and reliability analysis for integrated systems. Luis Rolíndez has a M.Sc. (2003) degree in Electrical Engineering from the University of Zaragoza, Spain, and a Ph.D. (2007) degree in Microelectronics from the National Polytechnic Institute ofGrenoble, France.He is now with STMicroelectronics (Central CAD & Design Solutions) at Crolles, France, as an analogue and mixed-signal designer. His research interests include analogue integrated circuit design, analogue and mixed-signal BIST techniques, simulation of highly integrated mixed-signal SoC and silicon debug. 相似文献
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采用SEM和TEM研究了室温(23℃)和中温(650、750、815℃)下第3代镍基粉末高温合金(FGH98)拉伸变形显微组织、行为和机制。结果表明:含有多模尺寸分布γ′相的合金具有优良的拉伸性能,室温拉伸主要变形机制为位错剪切γ′相形成层错,并在γ′相周围形成位错环,阻碍后续位错运动。中温拉伸变形机制为位错剪切γ′相形成层错和形变孪晶,随着变形温度的升高,形变孪晶增多。给出了a/3112不全位错剪切γ′相形成层错和形变孪晶共存的模型,随着应变量的增加,在连续相邻的{111}滑移面上层错堆积变多,促进连续孪晶的形成,协调了γ和γ′相两相之间的变形,有助于释放两相之间的变形应力和提高合金强韧性。 相似文献