相控阵天线的设计与FDTD分析

基于工作频率在1.79 GHz的微带天线,首先研究了移相器的设计方法,然后利用两种不同方法实现的移相器,分别设计出了相控阵天线。通过FDTD进行建模和仿真实验,计算了相控阵天线在不同扫描角的远场辐射方向图,分析了实验误差,得出了结论,所设计的相控阵天线结构简约,主瓣尖锐,最大扫描角大于45°。     

有线接入型业务资源配置规则及技术实现方法研究

针对有线接入型业务的资源配置规则进行分析,通过归纳总结系统现有配置规则,分析不同规则形成的条件要素,找到配置规则的合理管理办法,建立资源配置的经验库,并提供规则应用的分析方法,使得配置规则能更好地应用于资源系统.     

Highly Fluorescent and Color‐Tunable Exciplex Emission from Poly(N‐vinylcarbazole) Film Containing Nanostructured Supramolecular Acceptors

Highly fluorescent excited‐state charge‐transfer complexes (exciplexes) formed at the interfacial region between a polymeric donor matrix, here, poly(N‐vinylcarbazole), and embedded nanostructured acceptors are characterized for their photophysical properties. Exciplex‐to‐exciton emission switching is observed after solvent vapor annealing (SVA) due to the size evolution of the nanostructures beyond the exciton diffusion length. Color‐tunable exiplex emission (sky blue, green, and orange) is demonstrated for three different nanostructured acceptors with the same HOMO–LUMO gap (i.e., the same blue excitonic emission) but with different electron affinity. White‐emitting poly(N‐vinylcarbazole) film is also fabricated, simply by incorporating mixed supramolecular acceptors, which provide independent exciplex emissions. This study presents important insights into the excited‐state intermolecular interaction at the well‐defined nanoscale interface and suggests an efficient way to obtain multicolored exciplex emissions.     

Strategies for Fast‐Switching in All‐Polymer Field Effect Transistors

Low‐cost printable field effect transistors (FETs) are typically associated with slow switching characteristics. Dynamic response of polymer field effect transistors (PFETs) is a manifestation of time scales involved in processes such as dielectric polarization, structural relaxation, and transport via disordered‐interfacial states. A range of dielectrics and semiconductors are studied to arrive at a parameter which serves as a figure of merit and quantifies the different processes contributing to the switching response. A cross‐over from transport limiting factors to dielectric limiting factors in the dynamics of PFETs is observed. The dielectric limited regime in the PFET dynamics is tapped in to explore high speed processes, and an enhancement of switching speed by three orders of magnitude (from 300 μs to 400 ns) is observed at channel lengths which can be accessed by low cost printing methods. The device structure utilizes polymer‐ferroelectrics (FE) as the dielectric layer and involves a fabrication‐procedure which assists in circumventing the slow dynamics within the bulk of FE. This method of enhancing the dynamic response of PFETs is universally applicable to all classes of disordered‐FE.     

A Review of Three‐Dimensional Resistive Switching Cross‐Bar Array Memories from the Integration and Materials Property Points of View

Issues in the circuitry, integration, and material properties of the two‐dimensional (2D) and three‐dimensional (3D) crossbar array (CBA)‐type resistance switching memories are described. Two important quantitative guidelines for the memory integration are provided with respect to the required numbers of signal wires and sneak current paths. The advantage of 3D CBAs over 2D CBAs (i.e., the decrease in effect memory cell size) can be exploited only under certain limited conditions due to the increased area and layout complexity of the periphery circuits. The sneak current problem can be mitigated by the adoption of different voltage application schemes and various selection devices. These have critical correlations, however, and depend on the involved types of resistance switching memory. The problem is quantitatively dealt with using the generalized equation for the overall resistance of the parasitic current paths. Atomic layer deposition is discussed in detail as the most feasible fabrication process of 3D CBAs because it can provide the device with the necessary conformality and atomic‐level accuracy in thickness control. Other subsidiary issues related to the line resistance, maximum available current, and fabrication technologies are also reviewed. Finally, a summary and outlook on various other applications of 3D CBAs are provided.     

全景航空相机性能检测系统设计

为实现全景航空相机对地面目标的检测要求,根据其工作原理设计出一套可完成高精度、多参数航空相机的室内检测系统。首先在分析其性能指标和工作原理的基础上,给出了该检测系统的总体方案。详细设计了系统的主要组成部分:远目标模拟系统即大视场平行光管,动态图形发生系统等结构。提出平行光管和动态图形发生器核心参数的测试方法后,对所设计的检测系统进行实际测试,结果显示其整体性能满足所提设计要求。     

基于改进引力搜索算法的阵列天线波束赋形

提出了一种改进引力搜索算法,通过引入遗传算法的变异算子,提高了引力搜索算法的局部搜索能 力,解决了引力搜索算法在阵列天线赋形波束应用时的实现方法和早熟收敛问题。在阵元个数及阵元间距一定的 情况下,对阵元激励的幅值和相位进行优化,使赋形波束达到设计要求。实验结果证明了该改进方法的可行性和有 效性。     

具有简单线性补偿和准谐振导通的原边控制的单级反激式LED驱动器

A single-stage flyback driving integrated circuit （IC） for light-emitting diodes （LEDs） is proposed. With an average primary-side current estimation and negative feedback networks, the driver operates in the boundary conduction mode （BCM）, while the output current can be derived and regulated precisely. By means of a simple external resistor divider, a compensation voltage is produced on the ISEN pin during the turn-on period of the primary MOSFET to improve the line regulation performance. On the other hand, since the delay time between the time that the secondary diode current reaches zero and the turn-on time of the MOSFET can be automatically adjusted, the MOSFET can always turn on at the valley voltage even if the inductance of the primary winding varies with the output power, resulting in quasi-resonant switching for different primary inductances. The driving IC is fabricated in a Dongbu HiTek＇s 0.35μm bipolar-CMOS-DMOS process. An 18 W LED driver is finally built and tested. Results show that the driver has an average efficiency larger than 86%, a power factor larger than 0.97, and works under the universal input voltage （85-265 V） with the LED current variation within ±0.5%.     

单相电压源变换器减少开关次数调制算法的研究

作为基本的电力电子变换器,单相全桥结构两电平电压源变换器包括单相电压源逆变器、单相并网逆变器、单相电压源整流器和单相有源电力滤波器,具有广泛的应用场合。鉴于单相电压源变换器具有多解性,可以寻找一种减少开关次数的调制算法,以便降低开关损耗。本文根据三相电压源全桥结构两电平电压源变换器的最小开关次数调制算法,设计了一种适合单相全桥结构两电平电压源变换器的最少开关次数的调制算法,在理论分析的基础上,采用MATLAB/SIMULINK进行了仿真验证。     

Torus结构的芯片上光互连网络损耗分析和优化

基于硅基波导、十字状波导交叉和基于波导微环的光交换器件的损耗特性,对 Torus结构的芯片上光互连网络建立了损耗模型,利用该模型来对芯片上光互连网络进行光器件级、光路由器级和网络级的损耗特性分析,同时建立芯片上光互连网络损耗自动分析系统。依据该系统可以得到不同网络规模下的最大损耗,并分别分析了基于crossbar、cygnus和crux路由器的torus结构网络的损耗特性。可以得到,传输损耗随着网络规模的扩展而增加,最小的传输损耗出现在M=N时。同时,可以得到采用Crux路由器构成的芯片上光互连网络的传输损耗最小,小于Cygnus构成的芯片上光互连网络约5dB。