基于预编码的全码率准正交空时分组码

针对传统八天线全码率准正交空时分组码解码复杂度高的问题,该文提出了两种基于预编码的传输方案。利用四天线正交码扩展得到新的八天线准正交码,结合两个反馈相位信息构成的预编码矩阵,使信道矩阵正交化,消除码间串扰,实现码元独立最大似然解码。发送端采用交织技术,进一步提高了性能,实现了双码元联合最大似然解码。和获得满分集增益的星座图旋转方案不同,预编码方案最大程度上减少了码间串扰,提高准正交码的性能。仿真结果表明,基于预编码的两种准正交码性能好于星座旋转准正交码,而且降低了解码复杂度。     

适用于ASIC的高速低功耗逻辑单元

本文介绍一种ECL电路结构形式的ASIC逻辑单元的设计和应用。该单元使用2.5V的电源,内部开关电流设计为0.5mA,逻辑摆幅设计为340mV,输入输出均采用双向互补信号。它具有信息的基本记忆功能,用它进行多级组合配套设计,可制作不同模数的分频器、寄存器和计数器等。设计灵活,功能强,电路速度快,功耗低,仅为具有相同功能的普通ECL电路的1/30。这些电路可用在通讯机、电子控制系统、电子测量系结中作高速数字锁相环,数字信号处理的专用集成电路。     

Mixed-grained CMOS field programmable analog array for smart sensory applications

The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays （FPAAs）, which are the analogue counterparts of Field Programmable Gate Arrays （FPGAs）. In this paper, we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory micro- system. The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks （CABs） which house a variety of processing elements especially the proposed fine-grained Core Con- figurable Amplifiers （CCAs）. The high flexible CABs allow the FPAA operating in both continu- ous-time and discrete-time approaches suitable to support variety of sensors. To reduce the nonideal parasitic effects and save area, the fat-tree interconnection network is adopted in this FPAA. The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter. The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth. The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency. And the simulation results also show that the FPAA has good tolerance with wide PVT variations.     

(2n,r,t)_GFNSP结构一类不可能差分对的构造方法

构造不可能差分对是进行不可能差分分析的前提。该文研究了(2n,r,t)_GFNSP结构不可能差分对的构造问题,给出了该结构的一类(4n+1)轮不可能差分对的结构形式以及计算复杂度为O(n2r10)的构造算法,针对Shirai等提出的(2n,r,t)_GFNSP结构的DSM设计策略,本文给出了相应的(4n+1)轮不可能差分对的构造方法。     

基于缓存的语音/数据呼叫无线接入控制算法

该文提出了一种新的无线网络中语音/ 数据的呼叫接入控制算法(DTQ-VBR算法),设置资源预留的双重门限及呼叫缓存,兼顾数据业务的VBR特性,动态改变其服务带宽,并利用三维马氏链对其进行性能分析。大量的仿真实验表明,与DTR-Q、 DTBR算法相比,该文算法的平均信道利用率、呼叫强拆率及阻塞率等性能具有明显的提高。     

Space-frequency-Doppler coded OFDM over the time-varying Doppler fading channels

In this paper, space-frequency-Doppler coded OFDM (SFDO-OFDM) scheme over the time-varying Doppler fading channels via the time-frequency duality is proposed. Based on the basis expansion model (BEM) and the time-frequency duality, through the circulant matrix diagonalized processing, the nonlinear time-varying Doppler fading channel is dually converted to the virtual frequency-selective linear channels. With OFDM module, subgrouping the subcarriers in OFDM through the block matrix method and fatherly general complex orthogonal coding (GCOD) on each corresponding block subcarriers, SFDO-OFDM codes for the general multiple input multiple output (MIMO) is thus constructed. And concatenating it with the signal constellation precoding, full maximum diversity gains including the inherent Doppler fading are achieved. Theoretical analysis and corroborating simulation results demonstrate that, comparing with existing Doppler coding alternatives, the proposed scheme can effectively and robustly combat the Doppler fading with high bandwidth efficiency and even lower bit error ratio (BER).     

同步数字体系中155Mbit/s净荷的误码测试

本文基于光纤传输同步数字体系(S D H)系统的开发背景,较为详细地总结了155Mbit/s速率下的净荷误码测试机理.最后给出了净荷的误码测试方法以及误码测试系统的信号流程.     

块三对角线性方程组的可扩展块分割奇偶约化并行近似求解方法

文章对于一类严格块对角占优的块三对角线性方程组提出一个可扩展的块分割奇偶约化并行近似求解方法（PBOERA方法）。计算量减少到O（nm^2）＋O（m^3logm）;通信复杂度为常数。本方法在上海大学分布式并行计算机“自强3000”上使用64个节点进行了运行。得到线性加速比,并行效率达到90％以上。     

光传输系统中基于Bose第一类方法对QC-LDPC码的一种新颖构造方法

基于平衡不完全区组设计(BIBD)、循环矩阵分解和循环置换矩阵,提出了一种适用于光传输系统的新颖准循环低密度奇偶校验码(QC-LDPC)构造方法。利用Bose的第一类方法构造的低密度校验矩阵对其进行循环列分解得到相应的模板矩阵,再利用合适的循环置换矩阵对其进行扩展。采用该方法构造的QC-LDPC码具有良好的结构,且可根据实际需要来灵活地选择码长和码率。仿真结果表明:在误码率为10-6时其码率均为93.7%的情况下,该方法构造的novel-QC-LDPC(10992,10305)码比ITU-T G.975中RS(255,239)码的净编码增益(NCG)改善了约1.8d B。因此该构造方法所构造的QC-LDPC码具有更好的纠错性能,更适合高速长距离的光传输系统。     

Kernel-based template attacks of cryptographic circuits using static power

Side-channel attacks using static power have been shown to be successful against cryptographic circuits in different environments. This class of attacks exploits the power leakage when the circuit is in a static state, during which the power leakage is expected to be a fixed value. Due to the low signal-to-noise ratio of static power, usually more traces are needed for a static power attack to reach the same success rate as a dynamic power attack. The probabilistic distribution pattern of static power varies significantly in different devices, which further poses challenges to the accurate modeling of static power. In this paper we propose non-parametric template attacks which use a kernel methodology to improve the accuracy of modeling static power consumption. The proposed template attacks are tested using transistor-level simulations of circuits designed with a 45-nm standard cell library. Our test results show that our approach improves the success rate of template attacks using static power in cases where the distribution of static power consumption cannot be accurately modeled by Gaussian models.