一种异构双核SoC的抗SEU加固方案

异构双核SoC结构复杂,不同部分受到单粒子翻转(SEU)的影响程度不同。采用单一的技术对整个SoC进行加固,既浪费资源,效果也不好。根据不同部分受SEU影响的不同特点,选取SoC中受SEU影响最大的几个部分进行优化加固。使用自动三模冗余添加技术对处理器的寄存器堆和取指通道进行了加固,使用汉明码对存储器进行了加固,使用软硬协同的软件签名技术对CPU运行的程序进行了检测,不会对CPU的性能产生影响。仿真和物理实现的结果表明,相对于未加固的设计,该方案抗SEU能力提高了6倍,与全加固设计的抗SEU能力相当。该方案的面积消耗仅为34%,而全加固的为88%。     

Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies

A dual double interlocked storage cell(DICE)interleaving layout static random-access memory(SRAM)is designed and manufactured based on 65 nm bulk com-plementary metal oxide semiconductor technology.The single event upset(SEU)cross sections of this memory are obtained via heavy ion irradiation with a linear energy transfer(LET)value ranging from 1.7 to 83.4 MeV/(mg/cm2).Experimental results show that the upset threshold(LETth)of a 4 KB block is approximately 6 MeV/(mg/cm2),which is much better than that of a standard unhardened SRAM with an identical technology node.A 1 KB block has a higher LETth of 25 MeV/(mg/cm2)owing to the use of the error detection and correction(EDAC)code.For a Ta ion irradiation test with the highest LET value(83.4 MeV/(mg/cm2)),the benefit of the EDAC code is reduced significantly because the multi-bit upset pro-portion in the SEU is increased remarkably.Compared with normal incident ions,the memory exhibits a higher SEU sensitivity in the tilt angle irradiation test.Moreover,the SEU cross section indicates a significant dependence on the data pattern.When comprehensively considering HSPICE simulation results and the sensitive area distri-butions of the DICE cell,it is shown that the data pattern dependence is primarily associated with the arrangement of sensitive transistor pairs in the layout.Finally,some sug-gestions are provided to further improve the radiation resistance of the memory.By implementing a particular design at the layout level,the SEU tolerance of the memory is improved significantly at a low area cost.Therefore,the designed 65 nm SRAM is suitable for electronic systems operating in serious radiation environments.