和利时系统在化工安全仪表系统的解决方案

安全仪表系统(SIS)是对人身安全、装置设备及环境提供安全保护的装置。其设计理念与集散控制系统(DCS)不同,SIS特点是动作速度快,重点在于安全联锁保护,只在关键时动作;而DCS特点则是要求控制稳定,重点在连续生产过程监控。针对不同的安全级别的工艺装置,和利时安全系统在设计时采用不同的解决方案。     

接触放电辐射场初步分析与研究

本文对ESD接触放电通过辐射途径产生的场强进行了初步研究,利用暗室对其产生的辐射频率和场强进行了分析和实验     

深亚微米工艺中场氧器件静电防护能力的研究

研究了FOD在输入、输出和电源箝位部分ESD的工作特点,在0.18μm5V EEPROM CMOS工艺下流片、测试并分析了针对输入、输出和电源箝位的三种主流的ESD保护FOD器件,通过传输线脉冲测试仪的测量,重点分析了特征尺寸对器件ESD特性的影响及其设计方法。结果表明:影响FOD的ESD性能的主要因素是沟道长度、漏极长度和漏极接触孔到有源区的距离;增加沟道长,可适当提高FOD的ESD开启电压,但是会降低ESD防护性能;增加FOD的漏极长度和漏极接触孔到有源区的距离,可以提高FOD的ESD防护性能。提出了一种新型的浮体多晶硅岛屿型FOD结构,该结构不但结构简单,而且具有良好的ESD防护性能。     

机顶盒静电问题探讨及解决方案

针对一款塑料外壳的网络机顶盒受到ESD干扰时易死机的具体问题进行了理论分析,并通过调整PCB叠层和布局,提高了系统可靠性,最终使该产品通过了静电测试。     

基于SCR的ESD保护电路防闩锁设计

SCR器件作为目前单位面积效率最高的ESD保护器件,被广泛研究并应用到实际电路中.SCR所具有的低保持电压特性可以带来很高的ESD性能,但同时也会导致闩锁.文章从提高保持电压和触发电流这两方面入手,研究在实际电路应用中如何防止ESD保护电路发生闩锁.     

高压gg-LDMOS在ESD应力条件下的热特性研究

The thermal characteristics of high voltage gg-LDMOS under ESD stress conditions are investigated in detail based on the Sentaurus process and device simulators.The total heat and lattice temperature distributions along the Si–SiO2 interface under different stress conditions are presented and the physical mechanisms are discussed in detail.The influence of structure parameters on peak lattice temperature is also discussed,which is useful for designers to optimize the parameters of LDMSO for better ESD performance.     

Three-dimensional porous amorphous SnO2 thin films as anodes for Li-ion batteries

Three-dimensional (3D) porous amorphous SnO₂ thin films were deposited on Ni foam substrates by Electrostatic Spray Deposition (ESD) technique as anodes for Li-ion batteries. These films display good capacity retention of 94.8% after 100 cycles at 0.5 C and rate capability of 362 mAh/g at 10 C. The improved performance originates from the fact that the 3D porous structure offers a “buffer zone” to accommodate the large volume change during cycling, and the foam-like substrate maximizes the contact area between electrode and electrolyte. The facile ESD method can be potentially extended to prepare other 3D porous functional materials.     

静电放电电流的频谱分析与计算

从静电放电的人体模型入手 ,从理论上详细分析并计算了更具实际意义的人体 -金属模型静电放电电流的频谱 ,解决了电磁兼容 (EMC)测试中注入信号的特性问题。计算结果表明静电放电的高频能量相对较少 ,存在一有效带宽。静电放电电流的准确测试系统应有超宽频带和近百 d B的动态测定范围     

Variations in discharge current waveforms and their power spectra injected from contact discharges of ESD‐gun with different arrangements

The International Electrotechnical Commission (IEC) has prescribed an immunity test (IEC61000‐4‐2) of electronic equipment against electrostatic discharges (ESDs), in which a discharge current to be injected onto equipment under test is specified. As for the waveform, however, not the whole waveform but only the rise time, the first peak, and the current amplitudes at 30 and 60 ns are given in the time domain together with their uncertainties, which are required to check on the condition that an ESD generator (ESD‐gun) shall be arranged vertically to an IEC‐recommended calibration target and its earth return wire is kept away as far as possible from a vertical ground plane (IEC standard arrangement). In this study, to clarify how arrangements of an ESD‐gun and its earth return wire affect discharge currents, we measured discharge current waveforms for contact discharges of an ESD‐gun onto an IEC calibration target with respect to various inclinations of the ESD‐gun and arrangements of its earth return wire, and also calculated their current power spectra normalized to that of the discharge current for the IEC standard arrangement. As a result, we found that inclinations of the ESD gun affect the first peak current, which increases current power spectra by 14 dB at frequencies over 300 MHz, and that arrangements of the return wire influence the current waveforms between the first and second peaks, which provides variations in power spectra by ±12 dB in the frequency range from 10 MHz to 200 MHz. This finding suggests that arrangements of an ESD‐gun and its earth return wire are likely to cause different immunity test results. It was also found that in comparison with measured discharge currents for the standard arrangement, the calculated waveform of a discharge current from a formula, which has been included in the recent standard, has a more gentle falling waveform, and produces power spectra of +15 dB in the frequency range from 10 MHz to 200 MHz and –12 dB at frequencies over 300 MHz. © 2012 Wiley Periodicals, Inc. Electr Eng Jpn, 180(1): 9–14, 2012; Published online in Wiley Online Library ( wileyonlinelibrary.com ). DOI 10.1002/eej.21270     

FPGA静电损伤容错系统设计及演化修复能力研究

为探索静电放电对可编程逻辑器件的静电损伤(ESD)效应及其防护方法,选用人体模型,并利用ESS-606AESD模拟器对CycloneⅡFPGA芯片EP2C5Q208进行了ESD注入损伤效应试验。在此基础上,以演化硬件(EHW)技术为核心构建了一个具有自修复特性的强容错电子系统,并对其进行了故障注入试验。结果表明:ESD对FPGA不造成芯片损毁,只对放电管脚及其相关逻辑单元造成损伤,未放电管脚及芯片内部绝大部分逻辑单元功能完好。同时发现,系统演化修复能力与系统故障状况间具有较为明显的规律:(1)随着系统故障量的增大,影响系统演化修复能力的主要因素从演化算法的效率逐步转变为演化修复过程中的故障"避让"概率;(2)系统的演化修复能力与故障数量符合指数衰减规律。