快速退火气氛对300mm硅片内洁净区和氧沉淀形成的影响

300mm硅片中厚度合适的洁净区和高密度氧沉淀,有利于对器件有源区金属沾污的吸除,改善栅氧化物的完整性.文中使用Ar,N2/NHa混合气作为快速退火(RTA)气氛,研究RTA气氛对洁净区、氧沉淀形成的影响.研究发现N2/NHs混合气氛处理的硅片表层洁净区明显薄于Ar气氛处理的硅片,氧沉淀密度明显高于Ar气氛处理后的硅片.同时发现在两种气氛下,延长恒温时间都可以降低洁净区厚度,增加氧沉淀密度.基于空位增强氧沉淀成核和氮化空位注入的基本原理,就RTA气氛和恒温时间对洁净区和氧沉淀分布的影响进行了讨论.     

异质结n＋多晶硅/n型4H-SiC欧姆接触的制备

从理论和实验的角度研究了n型4H-SiC上的多晶硅欧姆接触.在P型4H-SiC外延层上使用P 离子注入来形成TLM结构的n阱.使用LPCVD淀积多晶硅并通过P 离子注入及扩散进行掺杂,得到的多晶硅方块电阻为22Ω/□.得到的n 多晶硅/n-SiC欧姆接触的比接触电阻为3.82×10-5Ω·cm2,接触下的注入层的方块电阻为4.9kΩ/□.对n 多晶硅/n-SiC欧姆接触形成的机理进行了讨论.     

TCOs for nip thin film silicon solar cells

Substrate configuration allows for the deposition of thin film silicon (Si) solar cells on non‐transparent substrates such as plastic sheets or metallic foils. In this work, we develop processes compatible with low T_g plastics. The amorphous Si (a‐Si:H) and microcrystalline Si (µc‐Si:H) films are deposited by plasma enhanced chemical vapour deposition, at very high excitation frequencies (VHF‐PECVD). We investigate the optical behaviour of single and triple junction devices prepared with different back and front contacts. The back contact consists either of a 2D periodic grid with moderate slope, or of low pressure CVD (LP‐CVD) ZnO with random pyramids of various sizes. The front contacts are either a 70 nm thick, nominally flat ITO or a rough 2 µm thick LP‐CVD ZnO. We observe that, for a‐Si:H, the cell performance depends critically on the combination of thin flat or thick rough front TCOs and the back contact. Indeed, for a‐Si:H, a thick LP‐CVD ZnO front contact provides more light trapping on the 2D periodic substrate. Then, we investigate the influence of the thick and thin TCOs in conjunction with thick absorbers (µc‐Si:H). Because of the different nature of the optical systems (thick against thin absorber layer), the antireflection effect of ITO becomes more effective and the structure with the flat TCO provides as much light trapping as the rough LP‐CVD ZnO. Finally, the conformality of the layers is investigated and guidelines are given to understand the effectiveness of the light trapping in devices deposited on periodic gratings. Copyright © 2008 John Wiley & Sons, Ltd.     

谐振式硅基集成光学陀螺的偏振噪声建模与分析

偏振噪声是谐振式集成光学陀螺的主要光学噪声源,其存在大大降低了系统的精度,为了定量化研究谐振式集成光学陀螺偏振噪声的产生机理,利用琼斯矩阵和光束传播法建立了谐振式硅基集成光学陀螺偏振噪声模型,该模型综合考虑了波导传输介质中的光偏振态交叉耦合、应力双折射等的影响,有效地逼近了实际的物理系统。基于上述模型得出了谐振腔内二氧化硅波导本征偏振态交扰与陀螺极限输出之间的表达式。对波导谐振腔内与偏振相关的3个因素:输入光偏振态、温度波动和波导保偏性能进行了仿真分析。并通过在输入端插入高偏振度起偏器的实验装置,有效验证了所建偏振理论模型受输入光偏振态波动影响的正确性。     

Study of waveguide coupling efficiency in hybrid silicon lasers

This paper presents a new method to increase the waveguide coupling efficiency in hybrid silicon lasers. We find that the propagation constant of the InGaAsP emitting layer can be equal to that of the Si resonant layer through improving the design size of the InP waveguide. The coupling power achieves 42% of the total power in the hybrid lasers when the thickness of the bonding layer is 100 nm. Our result is very close to 50% of the total power reported by Intel when the thickness of the thin bonding layer is less than 5 nm. Therefore, our invariable coupling power technique is simpler than Intel＇s.     

用于先进CMOS电路的150mm硅外延片外延生长

随着大规模和超大规模集成电路特征尺寸向亚微米、深亚微米发展,下一代集成电路对硅片的表面晶体完整性和电学性能提出了更高的要求.与含有高密度晶体原生缺陷的硅抛光片相比,硅外延片一般能满足这些要求.该文报道了应用于先进集成电路的150mm P/P+CMOS硅外延片研究进展.在PE2061硅外延炉上进行了P/P+硅外延生长.外延片特征参数,如外延层厚度、电阻率均匀性,过渡区宽度及少子产生寿命进行了详细表征.研究表明:150mm P/P+CMOS硅外延片能够满足先进集成电路对材料更高要求,     

CVD-based tungsten carbide schottky contacts to 6H-SiC for very high-temperature operation

In this study, tungsten carbide, with its hardness, chemical inertness, thermal stability and low resistivity (25 μΩ cm)¹ is shown as a reliable contact material to n- and p-type 6H-SiC for very high temperature applications. WC films with thicknesses of 100–150 nm were deposited by chemical vapor deposition (CVD) from a WF₆/C₃H₈/H₂ mixture at 1173 K. A method to pattern CVD-tungsten carbide is suggested. TEM analysis of as deposited samples displayed a clear and unreacted interface. The electrical investigations of the p-type 6H-SiC Schottky contacts revealed a high rectification ratio and a low reverse current density (6.1 × 10⁻⁵ A cm⁻², −10 V) up to 773 K. On n-type, a low barrier (Φ_Bn=0.79 eV) at room temperature was observed. The low Φ_Bn value suggests WC to be promising as an ohmic contact material on highly doped n-type epi-layers. We will show a temperature dependence for the barrier height of tungsten carbide contacts that can be related to the simultaneous change in the energy bandgap, which should be considered when designing SiC devices intended for high temperature operation.     

PECVD法制备纳米晶硅薄膜的研究进展

简要介绍了纳米晶硅薄膜的微结构表征方法,重点讨论了PECVD制备方法中工艺参数对薄膜结构的影响,并探讨了氢在薄膜形成和生长中的作用。通过优化氢稀释率、衬底温度、反应气压、激励功率和激发频率等工艺参数可提高纳米晶硅薄膜的晶化率并改善薄膜质量。结合喇曼光谱、X射线衍射谱、傅里叶红外光谱和高分辨透射电镜等表征方法可深入研究薄膜形成机理,对进一步探索薄膜光电特性有重要意义。分析了等离子体化学气相沉积(PECVD)制备方法中各工艺参数对薄膜质量和沉积速率的影响,指出其存在的问题,并探寻了今后的研究方向。     

SONOS非易失性存储器件研究进展

随着半导体存储器件的小型化、微型化,传统多晶硅浮栅存储因为叠层厚度过大,对隧穿氧化层绝缘性要求过高而难以适应未来存储器的发展要求。最近,基于绝缘性能优异的氮化硅的SONOS非易失性存储器件,以其相对于传统多晶硅浮栅存储器更强的电荷存储能力、易于实现小型化和工艺简单等特性而重新受到重视。文章论述了SONOS非易失性存储器件的存储原理和存储性能的影响因素研究进展,并在材料、工艺与结构设计等方面对SONOS存储器件性能改进的研究进展情况进行了分析和讨论。     

Defect Analysis of Barrier Height Inhomogeneity in Titanium 4H-SiC Schottky Barrier Diodes

Over 350 4H-SiC Schottky barrier diodes (SBDs) of varying size are characterized using current–voltage (I–V) measurements, with some also measured as a function of temperature. Devices display either a characteristic single-barrier height or atypical dual-barrier heights. Device yields are shown to decrease as device area increases. Molten KOH etching is used to highlight defects for analysis by optical microscopy and atomic force microscopy. The I–V characteristics are compared against the defect density. A positive correlation between effective barrier height and effective electrically active area of the SBDs is found. No correlation is found between threading dislocations and ideality factor or barrier height.