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排序方式: 共有7329条查询结果,搜索用时 15 毫秒
81.
采用热注入法制备了Cu2ZnSnS4(CZTS)纳米颗粒,并形成高分散、稳定的"墨水",采用滴注方法形成CZTS前驱体薄膜。利用X射线衍射(XRD)、拉曼光谱(Raman)、透射电子显微镜(TEM)和紫外-可见光谱(UV-VIS)对CZTS纳米颗粒的晶体结构、表面形貌和带隙进行了表征。Raman数据显示合成的纳米颗粒为纯的CZTS,不存在ZnS和Cu2SnS3等杂相。傅里叶红外光谱(FTIR)和UV-VIS表明合成的CZTS纳米颗粒表面被油胺(OLA)包覆,并且其带隙为1.52 eV。对CZTS前驱体薄膜在硫化氢气氛和固态硒气氛中退火处理,得到铜锌锡硫硒(CZTSSe)薄膜。结果表明,经硫化氢处理后薄膜表面平整但CZTS晶粒并没长大,而经过固态硒处理后得到了结晶质量较好的CZTSSe薄膜。 相似文献
82.
Ja-Young Jung Shin-Bok Lee Ho-Young Lee Young-Chang Joo Young-Bae Park 《Journal of Electronic Materials》2008,37(8):1111-1118
Anodic dissolution characteristics and electrochemical migration (ECM) behavior of Sn-3.0Ag-0.5Cu solder in NaCl and Na2SO4 solutions were investigated using anodic polarization tests and water drop tests (WDT). The ECM lifetime of Sn-3.0Ag-0.5Cu
solder in NaCl solution (42.4 s) was longer than that in Na2SO4 solution (34.8 s). The pitting potential of Sn-3.0Ag-0.5Cu solder in NaCl solution (135 mV, SCE) was higher than that in
Na2SO4 solution (−367 mV, SCE). The passivity film (SnO2) formed on Sn-3.0Ag-0.5Cu solder during WDTs in NaCl solution was thicker than that formed in Na2SO4 solution. Therefore, the longer ECM lifetime of Sn-3.0Ag-0.5Cu solder in NaCl solution than in Na2SO4 solution can be attributed to the higher pitting potential in the NaCl solution, which is ascribed to the formation of a
thicker passivity film (SnO2) in the former. It was confirmed that microelements such as Ag and Cu do not take part in ECM because they form chemically
stable intermetallic compounds with Sn. We believe that Sn is the only element that contributes to ECM, and dissolution of
Sn at the anode is possibly the rate-determining step of ECM of Sn-3.0Ag-0.5Cu solder. 相似文献
83.
84.
采用传统的固相反应工艺制备了Cu掺杂的CaCu3Ti4O12(Cu-CCTO)陶瓷。采用Schottky热电子发射模型研究了其晶界特征。研究了保温时间对Cu-CCTO陶瓷的介电性能和晶界特征的影响。结果表明:保温时间从1 h延长到30 h,Cu-CCTO陶瓷在100 kHz下的介电损耗保持在0.135,相对介电常数由3 600增至20 000以上。随着保温时间的延长,Cu-CCTO陶瓷的I-V非线性系数由1.8增至3.37,但击穿电场强度却由1 500 V/cm降至约700 V/cm。随着保温时间的延长,Cu-CCTO陶瓷的势垒高度和耗尽层宽度均增加。 相似文献
85.
Nanotwin formation and its physical properties and effect on reliability of copper interconnects 总被引:1,自引:0,他引:1
Di Xu Vinay Sriram Jenn-Ming Yang Gery R. Stafford Inka Zienert Petra Hofmann 《Microelectronic Engineering》2008,85(10):2155-2158
Ultra-fine grained copper with a large amount of nano-scale twin boundaries has high mechanical strength and maintains normal electrical conductivity. The combination of these properties may lead to promising applications in future Si microelectronic technology, especially as interconnect material for air-gap and free-standing copper technologies. Based on first principles calculations of total energy and in-situ stress measurements, high stress followed by stress relaxation during the Cu film deposition seems to have contributed to nanotwin formation. Nanoindentation studies have shown a larger hardness for copper with a higher nanotwin density. The effect of Cu nanotwin boundaries on grain growth was investigated by scanning electron microscopy (SEM), electron backscatter diffraction (EBSD) and transmission electron microscopy (TEM). The presence of a high density of nanotwin boundaries may improve the reliability of Cu interconnects. 相似文献
86.
87.
88.
C.F. Tsang C.Y. Li A. Krishnamoorthy Y.J. Su H.Y. Li L.Y. Wong W.H. Li L.J. Tang K.Y. Ee 《Microelectronics Journal》2004,35(9):693-700
Integration of Cu with low k dielectrics provided solution to reduce both resistance-capacitance time delay and parasitic capacitance of BEOL interconnections for 130 nm and beyond technology node. The motivation of this work is to study and improve electrical and reliability performance of two-level Cu/CVD low k SiOCH metallization from the results of diffusion barrier deposition schemes. Barrier deposition schemes are (a) high-density-plasma 250 Å Ta; (b) surface treatment of forming gas followed by high-density-plasma 250 Å Ta and (c) bi-layer of 100 Å Ta(N)/150 Å Ta. In this work, we demonstrated the superior and competency of high-density-plasma Ta deposition for Cu/CVD low k metallization and achieved excellent electrical and reliability results. Wafers fabricated with high-density-plasma Ta barrier scheme resulted in the best electrical yields, >90% for testing vehicles of dense via chains (via size=200 nm) and interspersed comb structures (width/space=200 nm/200 nm). Dielectric breakdown strength of the interspersed comb structures obtained at electric field of 0.3 MV/cm was ∼4 MV/cm. 相似文献
89.
This paper presents two new approaches used in the secondary ion mass spectrometry (SIMS) for high sensitivity dopant and
impurity analysis in HgCdTe materials, namely, the high mass resolution with dynamic transfer and the MCs+ technique. It is shown that better detection limits for As and Cu can be obtained at a level of 2–5e14 at/cm3. The MCs+ technique has added advantages of better measurement precision, monitoring Cd composition in the same profile, and small
device area analysis capability. Advantages and trade-offs of each technique are discussed and compared. An updated detection
limit table for all elements measured in HgCdTe materials using SIMS is also presented. 相似文献
90.