Multilevel augmentation algorithms based on fast collocation methods for solving ill-posed integral equations

This paper continues the theme of the recent work Chen et al. (2008) [18], in which fast collocation methods are introduced for solving ill-posed Fredholm integral equations of the first kind. We develop in this paper multilevel augmentation algorithms, which lead to fast solutions of the discrete equations resulting from fast collocation methods. Regularization parameter choice strategies are given for proposed methods. The theoretical analysis and numerical experiments illustrate the accuracy and efficiency of the algorithm.     

高度优先加法链m元标量速乘算法研究

为提高标量点乘在移动计算设备中的运算效率,并增强其计算安全性,比较分析了加法链方法、m-ary方法等标量点乘方法的执行过程和加速性能特征,提出了基于高度优先加法链和自由窗口宽度的Improved-m-ary的标量点乘方法。分析结论和实验仿真数据表明,该方法能有效减轻标量平均汉明重量,降低标量点乘计算量,内嵌的窗口值杂乱化机制使得其针对旁路信道分析攻击表现出出色的免疫力。     

基于DMD的驱动控制系统设计与实现

以DMD(数字微镜设备)为核心的DLP(数字光处理)投影技术有着巨大的应用潜力.因此,主要从DMD的时序驱动控制、数据产生与复位驱动控制3方面介绍了一种基于DMD的驱动控制系统的设计与实现方案,说明了主功能芯片DDC4100驱动芯片和DAD2000复位芯片的使用及功能,并在实际系统测试中成功地实现了对二值图像的显示.     

一种新型CMOS电流控制电流传输器

提出了一种基于共源共栅电流镜的CMOS电流控制电流传输器(CCCⅡ)电路。该电路由跨导线性环电路和共源共栅电流镜构成。相对于基于基本电流镜的CMOS电流控制电流传输器,该电路具有输出阻抗更大以及电流传输精度更高的优点。分析了电路的工作原理,给出了实验结果,验证了电路的正确性。     

A comparative runtime analysis of heuristic algorithms for satisfiability problems

The satisfiability problem is a basic core NP-complete problem. In recent years, a lot of heuristic algorithms have been developed to solve this problem, and many experiments have evaluated and compared the performance of different heuristic algorithms. However, rigorous theoretical analysis and comparison are rare. This paper analyzes and compares the expected runtime of three basic heuristic algorithms: RandomWalk, (1+1) EA, and hybrid algorithm. The runtime analysis of these heuristic algorithms on two 2-SAT instances shows that the expected runtime of these heuristic algorithms can be exponential time or polynomial time. Furthermore, these heuristic algorithms have their own advantages and disadvantages in solving different SAT instances. It also demonstrates that the expected runtime upper bound of RandomWalk on arbitrary k-SAT (k?3) is O(n(k−1)), and presents a k-SAT instance that has Θ(n(k−1)) expected runtime bound.     

Software execution processes as an evolving complex network

Inspired by the surprising discovery of several recurring structures in various complex networks, in recent years a number of related works treated software systems as a complex network and found that software systems might expose the small-world effects and follow scale-free degree distributions. Different from the research perspectives adopted in these works, the work presented in this paper treats software execution processes as an evolving complex network for the first time. The concept of software mirror graph is introduced as a new model of complex networks to incorporate the dynamic information of software behavior. The experimentation paradigm with statistical repeatability was applied to three distinct subject programs to conduct several software experiments. The corresponding experimental results are analyzed by treating the software execution processes as an evolving directed topological graph as well as an evolving software mirror graph. This results in several new findings. While the software execution processes may demonstrate as a small-world complex network in the topological sense, they no longer expose the small-world effects in the temporal sense. Further, the degree distributions of the software execution processes may follow a power law. However, they may also follow an exponential function or a piecewise power law.     

The space of EDF deadlines: the exact region and a convex approximation

It is well known that the performance of computer controlled systems is heavily affected by delays and jitter occurring in the control loops, which are mainly caused by the interference introduced by other concurrent activities. A common approach adopted to reduce delay and jitter in periodic task systems is to decrease relative deadlines as much as possible, but without jeopardizing the schedulability of the task set. In this paper, we formally characterize the region of admissible deadlines so that the system designer can appropriately select the desired values to maximize a given performance index defined over the task set. Finally we also provide a sufficient region of feasible deadlines which is proved to be convex.

基于不同排序方法的快速霍夫曼编码硬件实现

针对软件霍夫曼静态编码计算量大,而动态霍夫曼编码使得解码器同样复杂的缺点,提出了一种准动态霍夫曼硬件编码器。该编码器每次对一组数据序列进行静态编码,然后将编码并行输出,从而使得编码器具有较高的编码速度,而其延迟时间仅为一次编码过程的总时间。首先,为了充分利用硬件并行特性,分别使用动态排序和静态排序两种排序网络,以适应不同场合的编码需要。然后,使用数据流驱动的硬件二叉树构建和解析结构得到信源符号对应的霍夫曼编码。最后,将储存在FIFO中的输入数据查表并输出。设计结果表明,当使用Nexys4 DDR平台时,该编码器可以工作于100MHz以上的频率,同时具有吞吐高、延迟低、编码效率高和译码器简单的特性。     

基于修正变分法开孔板和加强板结构的自由振动分析

为研究船舶开孔板和加强板结构的振动特性,用1阶剪切变形板理论描述各向同性板的位移场,并采用修正变分原理和区域分解方法建立板的离散动力学模型.每一块子域板的位移和转角分量通过第一类切比雪夫正交多项式展开.针对加强板模型,将该方法获得的结果与已经发表的文献和有限元商用软件计算结果进行对比,验证该方法的收敛性和正确性.基于修正变分法探讨多种开孔和加强板模型的自由振动特性,充分说明该数理模型和半解析方法是一种适合处理复杂板结构问题的数值工具.     

A new fair scheduling algorithm for periodic tasks on multiprocessors

We present a new scheduling algorithm, called PL that is work-conserving and in terms of schedulability, optimal on multiprocessors for a synchronous periodic task set. The PL algorithm is a laxity based algorithm and ensures execution of a task with approximate proportional fairness at each task's period. Existing optimal algorithms on multiprocessors may cause excessive scheduling decisions and preemptions or may not be applied in a discrete environment. The proposed algorithm can be applied in a discrete environment and reduce the number of scheduling decisions and preemptions compared with a Pfair algorithm.