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1.
This paper focuses on the design of a 2.3–21 GHz Distributed Low Noise Amplifier (LNA) with low noise figure (NF), high gain (S21), and high linearity (IIP3) for broadband applications. This distributed amplifier (DA) includes S/C/X/Ku/K-band, which makes it very suitable for heterodyne receivers. The proposed DA uses a 0.18 μm GaAs pHEMT process (OMMIC ED02AH) in cascade architecture with lines adaptation and equalization of phase velocity techniques, to absorb their parasitic capacitances into the gate and drain transmission lines in order to achieve wide bandwidth and to enhance gain and linearity. The proposed broadband DA achieved an excellent gain in the flatness of 13.5 ± 0.2 dB, a low noise figure of 3.44 ± 1.12 dB, and a small group delay variation of ±19.721 ps over the range of 2.3–21 GHz. The input and output reflection coefficients S11 and S22 are less than −10 dB. The input compression point (P1dB) and input third-order intercept point (IIP3) are −1.5 dBm and 11.5 dBm, respectively at 13 GHz. The dissipated power is 282 mW and the core layout size is 2.2 × 0.8 mm2.  相似文献   
2.
The development of a sustainable energy system throughout an enterprise is a complex task, which requires an agile holistic approach. Such an approach needs to include a variety of objectives including energy strategy formation and strategic decision-making, which are directly related to the analysis and management of the main areas of sustainable development:The economic, technological, environmental, and social. These multidimensional requirements of sustainability are often difficult to achieve within the enterprise, because these aspects are interrelated and influenced by various internal and external environment factors. This paper first reviews the main challenges for an energy system, and then demonstrates how a strategic agile enterprise architecture driven approach could effectively guide the sustainable energy system development. The study presented in this paper provides a holistic approach that contributes to the advancement and usage of literature dealing with issues of sustainable energy system development and agile enterprise architecture, which has not been discussed before to any great extent.  相似文献   
3.
We investigated the resistive switching characteristics of a polystyrene:ZnO–graphene quantum dots system and its potential application in a one diode-one resistor architecture of an organic memory cell. The log–log IV plot and the temperature-variable IV measurements revealed that the switching mechanism in a low-current state is closely related to thermally activated transport. The turn-on process was induced by a space-charge-limited current mechanism resulted from the ZnO–graphene quantum dots acting as charge trap sites, and charge transfer through filamentary path. The memory device with a diode presented a ∼103 ION/IOFF ratio, stable endurance cycles (102 cycles) and retention times (104 s), and uniform cell-to-cell switching. The one diode-one resistor architecture can effectively reduce cross-talk issue and realize a cross bar array as large as ∼3 kbit in the readout margin estimation. Furthermore, a specific word was encoded using the standard ASCII character code.  相似文献   
4.
Protein databases used in research are huge and still grow at a fast pace. Many comparisons need to be done when searching similar (homologous) sequences for a given query sequence in these databases. Comparing a query sequence against all sequences of a huge database using the well-known Smith–Waterman algorithm is very time-consuming. Hidden Markov Models pose an opportunity for reducing the number of entries of a database and also enable to find distantly homologous sequences. Fewer entries are achieved by clustering similar sequences in a Hidden Markov Model. Such an approach is used by the bioinformatics tool HHblits. To further reduce the runtime, HHblits uses two-level prefiltering to reduce the number of time-consuming Viterbi comparisons. Still, prefiltering is very time-consuming. Highly parallel architectures and huge bandwidth are required for processing and transferring the massive amounts of data. In this article, we present an approach exploiting the reconfigurable, hybrid computer architecture Convey HC-1 for migrating the most time-consuming part. The Convey HC-1 with four FPGAs and high memory bandwidth of up to 76.8 GB/s serves as the platform of choice. Other bioinformatics applications have already been successfully supported by the HC-1. Limited by FPGA size only, we present a design that calculates four first-level prefiltering scores per FPGA concurrently, i.e. 16 calculations in total. This score calculation for the query profile against database sequences is done by a modified Smith–Waterman scheme that is internally parallelized 128 times in contrast to the original Streaming ‘Single Instruction Multiple Data (SIMD)’ Extensions (SSE)-supported implementation where only 16-fold parallelism can be exploited and where memory bandwidth poses the limiting factor. Preloading the query profile, we are able to transform the memory-bound implementation to a compute- and resource-bound FPGA design. We tightly integrated the FPGA-based coprocessor into the hybrid computing system by employing task-parallelism for the two-level prefiltering. Despite much lower clock rates, the FPGAs outperform SSE-based execution for the calculation of the prefiltering scores by a factor of 7.9.  相似文献   
5.
The need to reduce PEMFC systems cost as well as to increase their durability is crucial for their integration in various applications and especially for transport applications. A new simplified architecture of the anode circuit called Alternating Fuel Feeding (AFF) offers to reduce the development costs. Requiring a new stack concept, it combines the simplicity of Dead-End Anode (DEA) with the operation advantages of the hydrogen recirculation. The three architectures (DEA, recirculation and AFF) are compared in terms of performance on a 5-kW test bench in automotive conditions, through a sensitivity analysis. A gain of 17% on the system efficiency is observed when switching from DEA to AFF. Moreover, similar performances are obtained both for AFF and for recirculation after an accurate optimization of the AFF tuning parameters. Based on DoE data, a gain of 25% on the weight of the anodic line has been identified compared to pulsed ejector architecture and 43% with the classic recirculation architecture with blower only (Miraï).  相似文献   
6.
7.
本文介绍了ADIC iPlatform智能磁带库体系结构。  相似文献   
8.
Discrete Wavelet Transform: Architectures, Design and Performance Issues   总被引:3,自引:0,他引:3  
Due to the demand for real time wavelet processors in applications such as video compression [1], Internet communications compression [2], object recognition [3], and numerical analysis, many architectures for the Discrete Wavelet Transform (DWT) systems have been proposed. This paper surveys the different approaches to designing DWT architectures. The types of architectures depend on whether the application is 1-D, 2-D, or 3-D, as well as the style of architecture: systolic, semi-systolic, folded, digit-serial, etc. This paper presents an overview and evaluation of the architectures based on the criteria of latency, control, area, memory, and number of multipliers and adders. This paper will give the reader an indication of the advantages and disadvantages of each design.  相似文献   
9.
协同作战能力简析   总被引:2,自引:0,他引:2  
协同作战能力(CEC)是一种充分利用网络技术的新型海岸防空技术,给系统的作战能力带来了革命性的交破。本文对协同作战能力的产生、功能、组成以及未来的发展趋势作了详细的介绍,阐述了CEC系统的总体设计思想。在此基础上,将CEC系统与传统的作战系统的性能和设计思想在各方面进行了比较,交出了CEC系统各方面的优越性能。协同作战能力是现代和未来作战系统的发展方向,CEC系统的发展必将成为衡量各国国防科技现代化的重要指标。  相似文献   
10.
The cost of maintaining a software system over a long period of time far exceeds its initial development cost. Much of the maintenance cost is attributed to the time required by new developers to understand legacy systems. High-level structural information helps maintainers navigate through the numerous low-level components and relations present in the source code. Modularization tools can be used to produce subsystem decompositions from the source code but do not typically produce high-level architectural relations between the newly found subsystems. Controlling subsystem interactions is one important way in which the overall complexity of software maintenance can be reduced.We have developed a tool, called ARIS (Architecture Relation Inference System), that enables software engineers to define rules and relations for regulating subsystem interactions. These rules and relations are called Interconnection Styles and are definedusing a visual notation. The style definition is used by our tool to infer subsystem-level relations in designs being reverse engineered from source code.In this paper we describe our tool and its underlying techniques and algorithms. Using a case study, we describe how ARIS is used to reverse engineer high-level structural information from a real application.  相似文献   
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