基于脉冲变压器RSD直接式预充的设计与研究

基于反向开关晶体管(RSD)的工作原理,提出采用脉冲变压器隔离的直接式触发高压RSD,以解决系统对触发开关要求较高的问题。脉冲变压器的作用是隔离主放电回路的高压,同时在有限的时间内给RSD提供足够的预充电荷且经过一定的时间延迟后饱和。据此,利用变压器等效电路对其进行了设计,得到了变压器及电路的相关参数。利用电路仿真软件Saber仿真脉冲变压器的饱和特性,并进行了实验验证。最后以10kV电压通过RSD对负载放电为例,验证方案的可行性,得到峰值为12kA、底宽15μs、di/dt为2kA/μs的主电流。实验完毕,经测试,器件完好无损。     

Large-scale numerical investigation of solids mixing in a V-blender using the discrete element method

Over the past few years, the discrete element method (DEM) has been used in models for the simulation of granular flows in various mixing applications. If these models have shown rather efficient, they have so far been applied to predict the behavior of small numbers of particles over limited spans of time. The objective of this work is to show that DEM-based models can be used to predict the flow behavior of large numbers of particles over large spans of time and, more particularly, mixing phenomena that take time to manifest in such systems. To this end, several large-scale DEM-based numerical investigations of the flow of monodisperse and bidisperse blends of up to 225 000 particles over a span of 120 s in a V-blender will be discussed using entities such as the particle velocity and granular temperature, the torque of the mixing system, RSD curves and mixing times.     

Co-occurrence of aflatoxins and ochratoxin A in cereal flours commercialised in Turkey

In this study, we aim to determine co-occurrence of aflatoxins (AFs) and ochratoxin A (OTA) in cereal flours commercialised in Corum, Turkey. One hundred cereal flours were checked for target fungal metabolites between the years 2011 and 2013. The samples were analysed by high-performance liquid chromatography with fluorescence detection (HPLC-FLD) after immunoaffinity column (IAC) clean-up procedure. The method was successfully validated in accordance to European Union guidelines acceptance criteria for specificity, linearity, sensitivity, trueness and repeatability. All the results are well below the maximum limits specified in the EU legislation. AFs were detected neither wheat flour nor rice flour samples, while 66.7% of maize flours contained AFs with maximum concentration of 1.12 μg kg⁻¹. OTA was present in 26.7% of wheat flour, 41.7% of maize flour and 18.8% of rice flour samples, with mean levels of 0.247, 0.218 and 0.154 μg kg⁻¹, respectively. The co-occurence of AFs and OTA was found in 9 maize flour samples.     

基于LT码的LBCMP迭代纠错方法

针对删除信道中发生错误的数据包,提出联合信道编码的LBCMP迭代纠错方法,该方法充分利用错误数据包中含有的正确信息,将LT编码包作为冗余纠错包与线性分组码相结合,并采用MP迭代译码方法进行纠错.理论分析及实验结果表明,采用LBCMP迭代方法可以减少为恢复错误数据包所需要的信源编码包数量.     

反向开关晶体管开关通态峰值压降的精确测量与研究

基于反向开关晶体管的特殊工作原理,设计了并联电阻法精确测量RSD的通态峰值压降.介绍了通态峰值压降的测量原理及过程,并确定了电路参数.实验结果表明:直径16mm的单片反向开关晶体管在1.2kA的脉冲电流(脉宽17.5μs)下测得通态峰值压降为8.0V.并且,反向开关晶体管通态峰值压降随换流峰值的增大而增大;改变分压电阻...     

气相色谱法分析检测产品中磷酸二丁酯和磷酸三丁酯

利用毛细管色谱法建立了磷酸二丁酯(DBP)和磷酸三丁酯(TBP)的分析检测方法.实验测得,DBP和TBP在1-100 pg/L浓度范围内线性关系良好(R2 5=0.999 5),检出限(S/N= 3)为0.04-0.06p.g/L,定量限(S/N= 10)为0.16-0.25 pg/L,日内与日间检测的相对标准偏差分别...     

基于IBED和仿生算法的LT码度分布设计

度分布是影响Luby变换（Luby transform,LT）码性能优劣的关键因素,为了得到更优的度分布,提出一种基于改进的二进制指数分布（improved binary exponential distribution,IBED）和仿生算法的LT码度分布设计方案.采用IBED度分布进行LT编码,初始译码成功率可高达90%以上,但随着译码开销增大,译码成功率上升速度减缓,而此时鲁棒孤子分布（robust soliton distribution,RSD）的译码性能表现更佳.为了将IBED和RSD的优点有机结合,利用人工鱼群算法（artificial fish swarm algorithm,AFSA）在两种度分布间寻优,基于期望可译集构建该算法的目标函数,通过最大化目标值得到更优的度分布.仿真结果表明,与类似方法及传统的RSD相比,采用新度分布进行LT编码可明显降低译码开销,并节约编译码耗时.     

基于差分网格的抗RSD攻击盲指纹方案

为了提高数字指纹的抗综合攻击能力,构造了抗旋转、缩放、扭曲攻击(简记为RSD攻击)的数字指纹嵌入和提取策略。设计了数字指纹的空域—DCT域联合嵌入方案,给出了差分特征点的构造方法,以及基于差分特征点网格的数字指纹嵌入与提取算法,设计了高精度攻击参数辨识算法。实验结果表明,所提方案攻击参数辨识精度达到亚像素级,能抵抗缩放系数大于0.5的缩放攻击,45°角以内的任意旋转攻击,以及25°角以内的任意扭曲攻击;且指纹提取效果并不因旋转角度的增大而降低,也不因扭曲角度的增大而有明显降低。该方案提高了数字指纹的鲁棒性,使数字指纹系统在能抵抗去除攻击,剪切、平移、粘贴攻击(简称CTP攻击)的同时具备抵抗RSD攻击的能力。     

Experimental Study of Reversely Switched Dynistor Discharge Based on Gap Breakdown Load

Breakdown characteristics of a gap breakdown load was investigated in this study, and a Reversely Switched Dynistor (RSD) discharge circuit was designed based on the load. Based on the characteristics of the load the RSD discharge circuit was improved and optimized. The volume of the magnetic switch was reduced. To protect the thyristor and RSD, a diode was anti-parallely connected with the thyristor, which reduced the time requirement when a power voltage was applied to RSD. Experimental results show the circuit designed in this study can switch a high voltage and high current smoothly, and allows the power voltage to change in a wider range.     

A high‐speed RSD‐based flexible ECC processor for arbitrary curves over general prime field

This workpresents a novel high‐speed redundant‐signed‐digit (RSD)‐based elliptic curve cryptographic (ECC) processor for arbitrary curves over a general prime field. The proposed ECC processor works for any value of the prime number and curve parameters. It is based on a new high speed Montgomery multiplier architecture which uses different parallel computation techniques at both circuit level and architectural level. At the circuit level, RSD and carry save techniques are adopted while pre‐computation logic is incorporated at the architectural level. As a result of these optimization strategies, the proposed Montgomery multiplier offers a significant reduction in computation time over the state‐of‐the‐art. At the system level, to further enhance the overall performance of the proposed ECC processor, Montgomery ladder algorithm with (X,Y)‐only common Z coordinate (co‐Z) arithmetic is adopted. The proposed ECC processor is synthesized and implemented on different Xilinx Virtex (V) FPGA families for field sizes of 256 to 521 bits. On V‐6 platform, it computes a single 256 to 521 bits scalar point multiplication operation in 0.65 to 2.6 ms which is up to 9 times speed‐up over the state‐of‐the‐art.