深小孔脉冲电解加工精度控制研究

为了实现电解加工深小孔的精度控制,建立线性去除率动态数学模型,分析影响动态方程的工艺参数,通过在镍基合金上进行电解加工深小孔试验,分析了脉冲宽度、工具电极进给速度、工具电极绝缘层有无裸露对深小孔加工精度的影响。结果表明：采用较大的脉冲宽度、较大的工具电极进给速度、绝缘层覆盖全部工具电极,有利于提高孔的加工精度。     

MOS场引晶体管双极理论和实验

提出场引晶体管双极理论.替代已55年久,1952 Shockley发明单极理论.解释近来双栅纳米硅MOS晶体管实验特性--两条电子和两条空穴表面沟道,同时并存.理算晶体管输出特性和转移特性,包括实用硅基及栅氧化层厚度.理算比较最近报道实验,利用硅FinFET,含(金属/硅)和(p/n)结,源和漏接触.实验支持双极理论.建议采用单管,实现CMOS倒相电路和SRAM存储电路.     

Temperature-dependent ambipolar electrical characteristics of pentacene-based thin-film transistors: The impact of opposite-sign charge carriers

The temperature-dependent electrical and charge transport characteristics of pentacene-based ambipolar thin-film transistors (TFTs) were investigated at temperatures ranging from 77 K to 300 K. At room temperature (RT), the pentacene-based TFTs exhibit balanced and high charge mobility with electron (μ_e) and hole (μ_h) mobilities, both at about 1.6 cm²/V s. However, at lower temperatures, higher switch-on voltage of n-channel operations, almost absent n-channel characteristics, and strong temperature dependence of μ_e indicated that electrons were more difficult to release from opposite-signed carriers than that of holes. We observed that μ_e and μ_h both followed an Arrhenius-type temperature dependence and exhibited two regimes with a transition temperature at approximately 210–230 K. At high temperatures, data were explained by a model in which charge transport was limited by a dual-carrier release and recombination process, which is an electric field-assisted thermal-activated procedure. At T < 210 K, the observed activation energy is in agreement with unipolar pentacene-based TFTs, suggesting a common multiple trapping and release process-dominated mechanism. Different temperature-induced characteristics between n- and p-channel operations are outlined, thereby providing important insights into the complexity of observing efficient electron transport in comparison with the hole of ambipolar TFTs.     

Side‐Chain Engineering on Dopant‐Free Hole‐Transporting Polymers toward Highly Efficient Perovskite Solar Cells (20.19%)

A variety of dopant‐free hole‐transporting materials (HTMs) is developed to serve as alternatives to the typical dopant‐treated ones; however, their photovoltaic performance still falls far behind. In this work, the side chain of a polymeric HTM is engineered by partially introducing diethylene glycol (DEG) groups in order to simultaneously optimize the properties of both the bulk of the HTM layer and the HTM/perovskite interface. The intermolecular π–π stacking interaction in the HTM layer is unexpectedly weakened after the incorporation of DEG groups, whereas the lamellar packing interaction is strengthened. A doubled hole mobility is obtained when 3% of the DEG groups replace the original alkyl side chains, and a champion power conversion efficiency (PCE) of 20.19% (certified: 20.10%) is then achieved, which is the first report of values over 20% for dopant‐free organic HTMs. The device maintains 92.25% of its initial PCE after storing at ambient atmosphere for 30 d, which should be due to the enhanced hydrophobicity of the HTM film.     

超高强度钢薄壁深盲孔弹体的精密成形技术

通过变形工序的合理安排以及变形程度的合理分配,设计合理的原始坯料形状,采用适宜的冷、温锻模具结构,获得了一种能够用于大批量工业生产的超高强度钢制薄壁深盲孔弹体的精密成形工艺,从而解决了其制造过程中的关键技术,为宇航、兵器等行业普遍采用的这类零件的生产提供了一种实用、高效、经济、可靠的精密成形工艺。     

Contact-Barrier Free,High Mobility,Dual-Gated Junctionless Transistor Using Tellurium Nanowire

The gate-all-around nanowire transistor, due to its extremely tight electrostatic control and vertical integration capability, is a highly promising candidate for sub-5 nm technology nodes. In particular, the junctionless nanowire transistors are highly scalable with reduced variability due to avoidance of steep source/drain junction formation by ion implantation. Here a dual-gated junctionless nanowire p-type field effect transistor is demonstrated using tellurium nanowire as the channel. The dangling-bond-free surface due to the unique helical crystal structure of the nanowire, coupled with an integration of dangling-bond-free, high quality hBN gate dielectric, allows for a phonon-limited field effect hole mobility of 570 cm² V⁻¹ s⁻¹ at 270 K, which is well above state-of-the-art strained Si hole mobility. By lowering the temperature, the mobility increases to 1390 cm² V⁻¹ s⁻¹ and becomes primarily limited by Coulomb scattering. The combination of an electron affinity of ≈ 4 eV and a small bandgap of tellurium provides zero Schottky barrier height for hole injection at the metal-contact interface, which is remarkable for reduction of contact resistance in a highly scaled transistor. Exploiting these properties, coupled with the dual-gated operation, we achieve a high drive current of 216 μA μm⁻¹ while maintaining an on-off ratio in excess of 2 × 10⁴. The findings have intriguing prospects for alternate channel material based next-generation electronics.     

高速深孔加工顶紧系统设计分析

在高速深孔加工中,其中影响加工可靠性的重要因素就是工件以及受油器,在不同的高速深孔加工过程中,对连接工件以及受油器的顶紧力的要求也是不一样的,对顶紧力的精度有着更高的要求.本文就高速深孔加工顶紧系统设计进行具体地分析,进而使该技术得到更好地应用.     

无线物联网中的频谱感知模型研究

In the last few years, the number of devices operating in wireless Internet of Things (IoT) has experienced tremendous growth. On the other hand, the growth results in spectrum scarcity. Cognitive Radio (CR) systems have been proposed to efficiently exploit the spectra that have been assigned but are underutilized. In this paper, a spectrum sensing model based on Markov chain is proposed to predict the spectrum hole for CR in wireless IoT. Theoretical analysis and simulation results have been evaluated that a Markov model with two-state or four-state works well enough in wireless IoT whereas a model with more states is not necessary for it is complex.     

导通孔电镀铜填充技术

概述了下一代PCB用镀铜层导通孔填充技术。     

HDI板RCC料层孔壁爆裂原因分析和改善

分析了HDI板生产中RCC料层出现孔壁爆裂的原因,同时给出了改善方法,并对此原因和改善方法进行了验证。