基于规则的寄存器传输级ALU工艺映射算法的研究

提出寄存器传输级工艺映射（RTLM）算法,该算法支持使用高层次综合和设计再利用的现代VLSI设计方法学,允许复杂的RT级组件,尤其是算术逻辑单元（ALU）在设计中重用,该映射算法使用目标ALU组件来实现源ALU组件,映射规则通过表格的方式给出,此算法对于规则结构的数据通路特别有效,应用k阶贪婪算法的实验结果表明,RTLM在高层次综合中对数据通路组件再利用是一种有效的方法。     

Using Maude to write and execute ODP information viewpoint specifications

The aim of the open distributed processing (ODP) information viewpoint is to describe the semantics of the information and of the information processing in a system, from a global point of view, without having to worry about other considerations, such as how the information will be finally distributed or implemented or the technology used to achieve such implementation. Although several notations have been proposed to model this ODP viewpoint, they are not expressive enough to faithfully represent all the information concepts, or they tend to suffer from a lack of (formal) support, or both. In this paper, we explore the use of Maude as a formal notation for writing ODP information specifications. Maude is an executable rewriting logic language especially well suited for the specification of object-oriented open and distributed systems. We show how Maude offers a simple, natural, and accurate way of modeling the ODP information viewpoint concepts, allows the execution of the specifications produced, and offers good tool support for reasoning about them.     

The construction of a fuzzy inference network by extension of the rule inference network

Fuzzy logic can bring about inappropriate inferences as a result of ignoring some information in the reasoning process. Neural networks are powerful tools for pattern processing, but are not appropriate for the logical reasoning needed to model human knowledge. The use of a neural logic network derived from a modified neural network, however, makes logical reasoning possible. In this paper, we construct a fuzzy inference network by extending the rule–inference network based on an existing neural logic network. The propagation rule used in the existing rule–inference network is modified and applied. In order to determine the belief value of a proposition pertaining to the execution part of the fuzzy rules in a fuzzy inference network, the nodes connected to the proposition to be inferenced should be searched for. The search costs are compared and evaluated through application of sequential and priority searches for all the connected nodes.     

Neurovision-based logic control of an experimental manufacturing plant using neural net le-net5 and automation Petri nets

In this paper, Petri nets and neural networks are used together in the development of an intelligent logic controller for an experimental manufacturing plant to provide the flexibility and intelligence required from this type of dynamic systems. In the experimental setup, among deformed and good parts to be processed, there are four different part types to be recognised and selected. To distinguish the correct part types, a convolutional neural net le-net5 based on-line image recognition system is established. Then, the necessary information to be used within the logic control system is produced by this on-line image recognition system. Using the information about the correct part types and Automation Petri nets, a logic control system is designed. To convert the resulting Automation Petri net model of the controller into the related ladder logic diagram (LLD), the token passing logic (TPL) method is used. Finally, the implementation of the control logic as an LDD for the real time control of the manufacturing system is accomplished by using a commercial programmable logic controller (PLC).     

Concurrent software verification with states, events, and deadlocks

We present a framework for model checking concurrent software systems which incorporates both states and events. Contrary to other state/event approaches, our work also integrates two powerful verification techniques, counterexample-guided abstraction refinement and compositional reasoning. Our specification language is a state/event extension of linear temporal logic, and allows us to express many properties of software in a concise and intuitive manner. We show how standard automata-theoretic LTL model checking algorithms can be ported to our framework at no extra cost, enabling us to directly benefit from the large body of research on efficient LTL verification. We also present an algorithm to detect deadlocks in concurrent message-passing programs. Deadlock- freedom is not only an important and desirable property in its own right, but is also a prerequisite for the soundness of our model checking algorithm. Even though deadlock is inherently non-compositional and is not preserved by classical abstractions, our iterative algorithm employs both (non-standard) abstractions and compositional reasoning to alleviate the state-space explosion problem. The resulting framework differs in key respects from other instances of the counterexample-guided abstraction refinement paradigm found in the literature. We have implemented this work in the magic verification tool for concurrent C programs and performed tests on a broad set of benchmarks. Our experiments show that this new approach not only eases the writing of specifications, but also yields important gains both in space and in time during verification. In certain cases, we even encountered specifications that could not be verified using traditional pure event-based or state-based approaches, but became tractable within our state/event framework. We also recorded substantial reductions in time and memory consumption when performing deadlock-freedom checks with our new abstractions. Finally, we report two bugs (including a deadlock) in the source code of Micro-C/OS versions 2.0 and 2.7, which we discovered during our experiments. This research was sponsored by the National Science Foundation (NSF) under grants no. CCR-9803774 and CCR-0121547, the Office of Naval Research (ONR) and the Naval Research Laboratory (NRL) under contract no. N00014-01-1-0796, the Army Research Office (ARO) under contract no. DAAD19-01-1-0485, and was conducted as part of the Predictable Assembly from Certifiable Components (PACC) project at the Software Engineering Institute (SEI). This article combines and builds upon the papers (CCO⁺04) and (CCOS04). Received December 2004 Revised July 2005 Accepted July 2005 by Eerke A. Boiten, John Derrick, Graeme Smith and Ian Hayes     

Towards a re-programmable DNA computer

Microreactors lend themselves to a relatively simple implementation of DNA computing. Not only is the design of the DNA library critical for the success of the system but also the architecture of the microfluidic structure. Microreactors can be configured as Boolean operators. This paper will show that biomolecular computing can be performed with elementary building blocks, analogous to electronic logic gates. These logical operations will be performed using negative selection. Furthermore, an alternative bead barrier is introduced which can render the computer re-programmable and shows an principle architecture for selection and analysis.     

演化硬件技术及其在硬件设计中的应用

本文给出了基于演化算法和可编程逻辑器件的演化硬件的实现原理,并结合一个应用 实例加以说明,分析了该方法与传统的硬件设计方法相比的优越性,最后扼要介绍了演化硬件的研究方法以及它的应用现状和发展方向。     

Name-Passing in an Ambient-Like Calculus and Its Proof Using Spatial Logic

This paper studies a restricted version of the ambient calculus. We only allow single-threaded ambients migrating in a network of immobile ambients, exchanging payloads, and delivering them. With this restriction, we arrive at a calculus free from grave interferences. In previous works, this is only possible by sophisticated type systems.We focus on the expressiveness of the restricted calculus. We show that we can still repeat Zimmer's encoding of name-passing in our calculus. Moreover, we prove a stronger operational correspon- dence result using a novel spatial logic, which specifies spatial properties of processes invariant to process reductions.     

Maude's Internal Strategies

Maude is a reflective language supporting both rewriting logic and membership equational logic. Reflection is systematically exploited in Maude, endowing the language with powerful metaprogramming capabilities, including declarative strategies to guide the deduction process.     

Averaging analysis of periodically forced fluid networks

For a lumped parameter model of a flow network driven by a periodic generator, we apply averaging to find an approximate solution and analyze its stability. The approximate solution has three parts: mean flow due to the resistive effects of branches, a time-periodic part due to “inductive” effects, and a mean flow average correction due to the interaction of nonlinear and time varying effects. We present an example that may explain the scenario leading to venous diseases. It is shown that the widening of a branch in a venous network leads to an increase in the AC flow and a decrease in the DC flow through that branch, thus increasing the stress on venous valves, and consequently leading to a further increase in the effective width of the vein.