Charge‐Generating Mode Control in High‐Performance Transparent Flexible Piezoelectric Nanogenerators

In this work, we demonstrate the mode transition of charge generation between direct‐current (DC) and alternating‐current (AC) from transparent flexible (TF) piezoelectric nanogenerators (NGs), which is dependent solely on the morphology of zinc oxide (ZnO) nanorods without any use of an AC/DC converter. Tilted ZnO nanorods grown on a relatively low‐density seed layer generate DC‐type piezoelectric charges under a pushing load, whereas vertically aligned ZnO nanorods on a relatively high‐density seed layer create AC‐type charge generation. The mechanism for the geometry‐induced mode transition is proposed and characterized. We also examine the output performance of TF‐NGs which employ an indium zinc tin oxide (IZTO) film as a TF electrode. It is demonstrated that an IZTO film has improved electrical, optical, and mechanical properties, in comparison with an indium tin oxide (ITO) film. Enhanced output charge generation is observed from IZTO‐based TF‐NGs when TF‐NGs composed of only ITO electrodes are compared. This is attributed to the higher Schottky barrier and the lower series resistance of the IZTO‐based TF‐NGs. Thus, by using IZTO, we can expect TF‐NGs with superior mechanical durability and power generating performance.     

Impact of “terminal effect” on Cu electrochemical deposition: Filling capability for different metallization options

The 300 mm wafer copper electrochemical deposition (ECD) process for dual damascene metallization of semiconductor advanced interconnects is critically reviewed and the breakthroughs that enable further scaling of this process are examined. Special emphasis is placed on analyzing the critical issues, such as barrier/seed options, terminal effect and future plating prospects for this technology. The smallest plateable feature size values are estimated for different metallization integration schemes, such as conventional Physical Vapor Deposited (PVD) TaN/Ta/Cu, hybrid RuTa/Cu, CuMn (8%) self-forming barrier/seed, and Plasma-Enhanced Atomic Layer Deposition (PEALD) Ru, limiting the allowed maximum sheet resistance to 14 Ohms/sq for the Cu-based seeds and the effective maximum filling aspect ratio to 5-6.     

Controlled Synthesis of Various Hollow Cu Nano/MicroStructures via a Novel Reduction Route

Hollow Cu nano/microstructures are prepared by reduction of CuSO₄ · 5 H₂O with glucose by using a mild hydrothermal process. The X‐ray powder diffraction and energy‐dispersive X‐ray analysis indicate that the products are pure Cu and of cubic phase. The morphology of the products can be controlled between nanotubes and microspheres assembled from hollow nanoparticles by adjusting the concentration of sodium dodecyl sulfate. A series of experiments confirm that the concentration of the glucose and NaOH also play important roles in the formation of the hollow Cu nano/microstructures.     

Residual stress estimation in damascene copper interconnects using embedded sensors

Mechanical stress in damascene copper/low-k interconnects has been studied by means of micro-rotating sensors embedded in chips and directly integrated in CMOS process flow. A new hinge sensor design has been elaborated and a new analytical model of the mechanical equilibrium of sensors is validated. These sensors allow the study of the average residual stress as a function of the line width in a range from few hundred nanometers to several microns. It was found that the residual stress increases from 290 to 850 MPa in, respectively, 2 and 0.25 μm wide lines. This trend shows a yield stress increase with the line width reduction. Copper grains microstructure change between large and narrow lines is probably one of the reasons for yield stress and so residual stress increase. This microstructure change has been observed by means of Transmission Electron Microscopy (TEM) observations.     

Thermal characteristic of Cu-Cu bonding layer in 3-D integrated circuits stack

Copper (Cu) thermo-compression bonding of wafers can be used to fabricate multi-layer three-dimensional (3-D) integrated circuits (ICs). This work examines the thermal characteristic of the Cu bonding layer and demonstrates experimentally that Cu bonding layer can act as a spreading layer that helps in heat dissipation of bonded 3-D ICs stack more efficiently compared to silicon dioxide bonding layer. The use of Cu bonding layer in a double-layer stack of ICs provides better cooling by as much as 9 °C compared to oxide bonding interface.     

直流磁控溅射ITO薄膜的正交试验分析

利用直流磁控溅射系统制备ITO薄膜,采用正交试验表格L32(48)安排试验.测试了薄膜的方阻和透过率,分析了8个工艺参数对薄膜电光特性的影响,其中沉积气压、氩氧流量比和退火温度的影响最大.分析得到优化工艺参数为:沉积气压2×133.322 4 mPa、氩氧流量比16∶0.5、退火温度427 ℃、靶基间距15、退火时间1 h、溅射功率300 W、退火氛围为真空、沉积温度227 ℃.在此工艺参数下制备的ITO薄膜方阻为17 Ω/□,电阻率为1.87×10-4Ω·cm,在可见光区域平均透过率为85.13%.     

ZnSe纳米材料及界面的制备与表征

利用热蒸发法对ZnSe纳米材料的相控合成进行了研究,制备了多种具有稳定闪锌矿和亚稳纤锌矿结构的ZnSe纳米材料,如ZnSe纳米线、纳米圈、纳米轮及三晶纳米带。同时,在相控合成基础上,通过改变管式炉内反应压强获得了几种同质与异质界面。利用多种透射电子显微学手段对合成的ZnSe纳米材料及相关同质与异质界面进行了深入表征,并对ZnSe纳米材料的生长机理进行了探讨。     

详谈PCB钻孔孔壁镀铜开裂问题及解决方案

PCB作为重要的电子部件,其钻孔质量的优劣直接关系到产品性能的稳定程度,尤其在航空、航天、军事等重要领域,钻孔质量在电气连接特性及使用可靠性方面起着至关重要的作用。文章针对PCB钻孔过程中出现的孔壁镀层开裂问题,结合金属切削理论基础,从钻孔参数、刀具选择、板材结构与叠层、分段钻孔、材料对比等方面进行了详尽的分析与交叉实验比较,下面对具体解决过程与结果进行阐述。     

Metalorganic InP and Inx Ga1-x,Asy P1-y,on InP epitaxy at atmospheric pressure

We present a procedure for the MOVPE of InP as simple as the one currently used for GaAs. InP and InGaAsP alloys are grown on InP substrates using trimethy1indium (TMI), phosphine, trimethylgallium (TMG) and arsine. The choice of carrier gas is important ; a mixture of hydrogen and nitrogen allowed us to grow uniform layers over large areas at atmospheric pressure, without pyrolizing the phosphine or separating the input reactants. Preliminary characterization results are presented. Most information contained in this paper was presented at the 1983 Electron Materials Conference as paper Cl.     

微导通孔填铜电镀的影响因素研究

由于印制电路板对高密度、高精度、高可靠性及低成本的强烈需求,常规的导通孔敷形镀技术已经不能满足高密度布线的要求,所以提出了微导通孔填铜电镀和微盲孔填铜电镀技术。通过在添加剂方面对影响微导通孔填铜电镀的因素进行分析,运用正交试验的研究方法,得到了添加剂的最优组合和配比,从而实现微导通孔的较好填充。