Thermal Stability Study of Cu(MoN<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript>) Seed Layer on Barrierless Si

This study reports the good thermal stability of a sputtered Cu(MoN _x ) seed layer on a barrierless Si substrate. A Cu film with a small amount of MoN _x was deposited by reactive co-sputtering of Cu and Mo in an Ar/N₂ gas mixture. After annealing at 560°C for 1 h, no copper silicide formation was observed at the interface of Cu and Si. Leakage current and resistivity evaluations reveal the good thermal reliability of Cu with a dilute amount of MoN _x at temperatures up to 560°C, suggesting its potential application in advanced barrierless metallization. The thermal performance of Cu(MoN _x ) as a seed layer was evaluated when pure Cu is deposited on top. X-ray diffraction, focused ion beam microscopy, and transmission electron microscopy results confirm the presence of an ∼10-nm-thick reaction layer formed at the seed layer/Si interface after annealing at 630°C for 1 h. Although the exact composition and structure of this reaction layer could not be unambiguously identified due to trace amounts of Mo and N, this reaction layer protects Cu from a detrimental reaction with Si. The Cu(MoN _x ) seed layer is thus considered to act as a diffusion buffer with stability up to 630°C for the barrierless Si scheme. An electrical resistivity of 2.5 μΩ cm was obtained for the Cu/Cu(MoN _x ) scheme after annealing at 630°C.     

Physical investigation of the impact of electrolessly deposited self-aligned caps on insulation of copper interconnects

With the miniaturization of ULSI circuits and the associated increase of current density up to several MA/cm², copper interconnects are facing electromigration issues at the top interface with the dielectric capping layer SiC(N). A promising solution is to insert selectively on top of copper lines a CoWP metallic self-aligned encapsulation layer, deposited using a wet electroless process. We study the impact of this process on electrical line insulation as a function of cap thickness at the 65 nm technology node and we investigate the physical origin of leakage currents. Below a critical thickness, only a slight leakage current increase of less than one decade is observed, remaining within the specification for self-aligned capping layer processes. Above this critical thickness, large leakage currents are generated due to the combined effect of lateral growth and the presence of parasitic redeposited nodules. We show that a simple phenomenological model allows to reproduce the experimental data, to assess quantitatively the contribution of parasitic defects, and to predict that the self-aligned barrier technology should be extendible up to the 32 nm node, provided that a thin cap layer of less than 8 nm is used.     

印制电路板钻铣工序金属回收的探讨

本文探讨了印制电路板生产中钻、铣和磨刷工序产生铜粉回收技术,包括分离装置和原理。     

铜厚膜环行器的研制

采用新型的在大气气氛中烧结的铜厚膜多层导电浆料,应用厚膜混合技术制作了2。2GHz和2.8GHz的环行器。其性能指标可与同类型采用薄膜贵金属制作的环行器相媲美,且工艺简单,成本低及生产周期短。     

碲镉汞集成偏振探测器应力分析

红外碲镉汞集成偏振探测器的结构是采用多个芯片叠层的方式,由于各层的材料不同,热膨胀系数不同,在低温下工作时各层界面之间存在应力,应力控制的不好会造成芯片裂片等情况,导致探测器性能劣化或无法使用。本文对长波320×256碲镉汞集成偏振探测器的裂片现象进行了分析,对存在的应力运用软件进行了仿真,得到了碲镉汞芯片上的应力值及减小应力的方向。针对仿真分析的结果进行了相应的铟柱降低、碲锌镉衬底减薄的试验,解决了碲镉汞集成偏振探测器的裂片现象。     

Interfacial reactions between liquid indium and Au-deposited substrates

The morphology and growth kinetics of intermetallic compounds formed during the soldering reactions of liquid indium on Au-deposited substrates in the temperature range of 225°C and 350°C have been investigated. The results show that two types of AuIn₂ intermetallic compounds make their appearance: the continuous-wavy-crystalline type, and the floating-island type. The growth of this intermetallic compound follows the parabolic law, which indicates that the growth is diffusion-controlled. The activation energy of the reaction calculated form the Arrhenius plot of growth reaction constants is 39.42 kJ/mol. Also, the wettability of liquid indium on the surface of the gold-deposited substrate is determined from contact angle measurements. Finally, a mechanism for the interpretation of the wetting behavior of the said Au/In system is proposed, which can be ascertained by SEM observations.     

喷流方式对电镀填孔影响分析

电子产品更轻、更薄的发展趋势,使印制电路板在高密度互连技术上面临挑战。微孔堆叠技术是一种用来实现高密度互连的方法。如今,电镀填孔工艺已得到广泛的应用,主要是通过对流使填孔光剂产生吸附、消耗和扩散,从而填充盲孔。本文着重从底喷的对流的方式来介绍其对盲孔填孔的影响。     

Atomic layer chemical vapour deposition of copper

Copper films with (1 1 1) texture are of crucial importance in integrated circuit interconnects. We have deposited strongly (1 1 1)-textured thin films of copper by atomic layer deposition (ALD) using [2,2,6,6-tetramethyl-3,5-heptadionato] Cu(II), Cu(thd)₂, as the precursor. The dependence of the microstructure of the films on ALD conditions, such as the number of ALD cycles and the deposition temperature was studied by X-ray diffraction, scanning electron microscopy (SEM), and transmission electron microscopy. Analysis of (1 1 1)-textured films shows the presence of twin planes in the copper grains throughout the films. SEM shows a labyrinthine structure of highly connected, large grains developing as film thickness increases. This leads to low resistivity and suggests high resistance to electromigration.     

浅谈线路板图形电镀阻镀成因及解决之道

介绍电镀阻镀的典型缺陷模式,结合过往的经验及进行一系列DOE试验,层别出每种缺陷的具体成因,大幅度低了电镀阻镀造成的孔破报废,也降低而流失到客户端的风险。     

锑化铟抛光片表面粗糙度优化研究

锑化铟是中波红外探测应用较广的材料。抛光片的表面粗糙度是影响器件性能的关键指标。研究了锑化铟化学机械抛光(Chemical Mechanical Polishing, CMP)液的pH值、氧化剂比例以及抛光液流速对锑化铟抛光片表面粗糙度的影响,并结合原子力显微镜(Atomic Force Microscope, AFM)和表面轮廓仪测试对抛光片的表面粗糙度进行了表征和优化。结果表明,当pH值为8、氧化剂比例为0.75%、抛光液流速为200 L/min时,InSb晶片的表面粗糙度为1.05 nm (AFM),同时晶片的抛光宏观质量较好。