Deposition thickness based high-throughput nano-imprint template

International Technology Roadmap for Semiconductors 2003 projected nano-imprint lithography has the potential of high throughput, sub-20 nm resolution, and low cost [S.Y. Chou, P.R. Krauss, P.J. Renstrom, Appl. Phys. Lett. 67 (1995) 3144; Science 272 (1996) 85, J.A. Rogers, C. Mirkin, Mater. Res. Bull. 26 (2001)]. For nano-imprint lithography, a template with 1X resolution is required. The existing industrial infrastructure for supporting deep ultra violet 4X photo masks by e-beam and/or a laser beam scanning writer does not offer pitch (center-to-center distance of an array of patterned lines) less than ∼60 nm [<http://public.itrs.net/2003ITRS>]. For nano-imprint lithography to be accepted across the industry, a reproducible simple fabrication process to make a high resolution, single emboss template is essential [L. Jay Guo, J. Phys. D: Appl. Phys. 37 (2004) R123-R141]. Here we show, a general fabrication method and fabricated nano-imprint templates with sub-15 nm template line width and 10 nm pitch length through out the entire 200 mm wafer, varying the deposition thickness of multiple alternate films, using atomic layer deposition. Although multilayer nano-imprint templates and their exciting use have been demonstrated, [W.J. Dauksher et al., J. Vac. Sci. Technol. B 22 (2004) 3306, B. Heidari, et al., The 49th international conference on electron, ion and photon beam technology and nanofabrication, Orlando, Florida, 2005, William M. Tong, et al., Proc. SPIE 5751 (2005) 46-55, N.A. Melosh, A. Boukai, F. Diana, B. Gerardot, A. Badolato, P.M. Petroff, J.R. Heath, Science 300 (2003) 112] such a small pitch was not shown and either complex lattice mismatch-based epitaxially grown films or unconventional etch chemistry was used. The bare necessity was a simple and economical fabrication process for a high throughput nano-imprint template. In that context, we have developed a template fabrication process using classical micro-fabrication techniques. Successful use of these techniques made the template fabrication process simple, economical, and expedient. Also a novel technique to provide flexible and accurate alignment for nanowire patterning has been described. In this technique, nanowire patterning is accomplished on the entire wafer with a single impression. Industry level batch-fabrication of our scheme illustrates its reproducibility and manufacturability. We anticipate, this simple, economical and time saving technique will help researchers and developers to perform their experiment on nano-scale feature patterned substrates easily and conveniently.     

天然气净化厂硫磺回收及尾气处理过程有机硫的产生与控制措施

天然气净化厂硫磺回收及尾气处理装置尾气中有机硫含量对SO_2减排有重要影响。研究表明,硫磺回收装置的燃烧炉、催化反应器及尾气处理装置的加氢水解反应器中均会生成有机硫。对此,可通过减少酸气中烃类含量、提高燃烧炉温度、选择合适催化剂类型以及保持较高的加氢水解反应温度等措施,有效降低有机硫的生成量。同时,对于过程中生成的有机硫,应优化催化剂组合方式,在各级反应器中叠加水解,并保持加氢水解单元的高效转化,将进入灼烧炉的有机硫含量降至最低,从而实现生产装置尾气排放达标。     

渝东南盆缘转换带龙马溪组页岩气散失过程、能力及其主控因素

研究页岩气的散失过程、散失能力及其控制因素对于揭示页岩气的成藏机理、指导页岩气的勘探选区等都具有重要的现实意义。为此,以四川盆地东南部及其盆缘转换带(以下简称渝东南盆缘转换带)下志留统龙马溪组页岩为例,通过现场解吸实验模拟页岩气散失过程,并借助X射线衍射分析、有机碳含量测试、低温氮气吸附实验、等温吸附实验、扫描电镜观察等室内研究手段,定性分析页岩气的散失过程,定量评价页岩气的散失能力,并在此基础上探讨影响页岩气散失能力的主控因素。研究结果表明:(1)该转换带龙马溪组上、下段页岩的页岩气散失过程存在着明显的差异,后者的散失能力明显低于前者;(2)页岩气散失能力主要由温度、压力及岩石属性等决定,其中温度、压力是最主要的外在因素;(3)有机质含量是决定页岩气散失能力的最主要内在控制因素,随有机质含量的增加,页岩比表面积增大、吸附能力增强,页岩气散失能力降低;(4)页岩气散失能力在一定程度上受到岩石矿物成分和孔隙结构的影响,石英含量、黄铁矿含量与散失能力呈负相关关系,长石含量与散失能力呈正相关关系,碳酸盐矿物含量和黏土矿物含量与散失能力之间的相关性不明显。     

Synergistic Use of Pyridine and Selenophene in a Diketopyrrolopyrrole‐Based Conjugated Polymer Enhances the Electron Mobility in Organic Transistors

To achieve semiconducting materials with high electron mobility in organic field‐effect transistors (OFETs), low‐lying energy levels (the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO)) and favorable molecular packing and ordering are two crucial factors. Here, it is reported that the incorporation of pyridine and selenophene into the backbone of a diketopyrrolopyrrole (DPP)‐based copolymer produces a high‐electron‐mobility semiconductor, PDPPy‐Se. Compared with analogous polymers based on other DPP derivatives and selenophene, PDPPy‐Se features a lower LUMO that can decrease the electron transfer barrier for more effective electron injection, and simultaneously a lower HOMO that, however, can increase the hole transfer barrier to suppress the hole injection. Combined with thermal annealing at 240 °C for thin film morphology optimization to achieve large‐scale crystallite domains with tight molecular packing for effective charge transport along the conducting channel, OFET devices fabricated with PDPPy‐Se exhibit an n‐type‐dominant performance with an electron mobility (μ_e) as high as 2.22 cm² V^?1 s^?1 and a hole/electron mobility ratio (μ_h/μ_e) of 0.26. Overall, this study demonstrates a simple yet effective approach to boost the electron mobility in organic transistors by synergistic use of pyridine and selenophene in the backbone of a DPP‐based copolymer.     

Thermal Shrinkage Behavior of Metal–Organic Frameworks

Thermal treatment of metal–organic frameworks (MOFs) as a post‐treatment approach has grown in popularity and resulted in various MOF‐derived materials. However, the widely used extreme thermolytic conditions (usually above 500 °C) lead to degradation in the well‐defined MOFs intrinsic properties. This work demonstrates that MIL‐101 calcined at medium‐temperature range (200–280 °C) partially breaks the coordination bonds that can introduce more accessible active sites, exhibiting a 10‐fold increase in oxidation activity while retaining its intrinsic structure and porosity. Another fascinating feature of MIL‐101 calcined in this temperature range is their temperature‐dependent shrinkage behavior, which is also found in many other types of MOFs. Based on different shrinkage ratios of various MOFs, yolk–shell MOFs@MOFs structures can be constructed through nonsacrificial template method. Overall, the structural and morphological evolution process of MOFs treated in the medium‐temperature range can open new horizons to develop efficient MOFs catalysts and design complex structures.     

新型低压高效叠层有机白光器件

以Bphen:Li/WO3作为电荷产生层制备了低压、高效有机叠层白光器件. 实验中,首先在器件中引入高导电性的载流子注入和传输层,有效降低了器件的驱动电压,然后通过电荷产生层垂直堆叠两个低压白光器件,获得了低压、高效有机叠层白光器件. 叠层器件性能与单发光单元的器件相比较,其亮度及效率均有大幅提高,叠层器件的最大电流效率达到了17cd/A,在相同的电流密度下,叠层器件的效率约为传统器件的2.3倍,同时由于在叠层结构中引入了高导电性的载流子传输层,有效降低了器件的驱动电压,显著改善了白光器件的流明效率.叠层器件的流明效率相对于单发光单元器件提高了53%.     

利用I-Z曲线的STM"接触"模式的电学测量和表面改性研究

利用STM对金属有机络合物电双稳材料Ag—TCNQ薄膜进行电学性质的表征与改性，在针尖强电场的作用下，当电压达到某一阈值后薄膜从高阻态跃迁至低阻态，这两种高低阻态分别定义为一个存储单元的“0”与“1”状态。本文考虑到在STM的常规恒流工作模式下，针尖与样品之间的隧道结对于电学性质的表征与改性具有影响。为此测量隧道电流I对隧道结宽度Z的依赖关系，I-Z曲线，从而确定针尖刚好接触样品的接触点，利用STM进行了针尖与样品“接触式”的电学测量和表面电学改性研究，并与常规工作模式进行了比较。     

InGaAs／AlGaAs 941 nm高功率半导体激光二极管阵列

利用金属有机化合物气相淀积(MOCVD)技术生长了InGaAs／GaAs／AlGaAs分别限制应变单量子阱激光器材料。利用该材料制成半导体激光器线阵的峰值波长为941nm，光谱的半高全宽(FWHM)为3．3nm，在400μs、50Hz的输入电流下，输出峰值功率达到67．9W，斜率效率高达0．85W／A(64％)。     

新型高速电光调制器

介绍了目前高速长距离光纤通信中常用的电光调制器的原理、结构和应用．目前半导体调制器的研究日趋成熟，性能不断改善．有机聚合物电光调制器被公认为是最具潜力的高速光通信调制器，正成为人们关注的焦点．