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91.
在某砌石双曲拱坝施工中,由于施工放样的错误,使已建拱坝坝轴线偏离了设计坝轴线,为此需要重新调整拱坝体型。根据已建成的拱冠梁上游面曲线重新确定新的曲线方程,待建部分用新的曲线方程延伸,经空间有限元的应力变形分析,认为调整后的拱坝体型可行。现已付予实施。 相似文献
92.
介绍了古洞口工程泄洪洞工作弧门在特定地形下采用固定卷扬式启闭机和汽车吊配合闸室的预埋件进行闸门安装的施工工艺。对闸门的吊装、调整及焊接工艺的具体措施作了详细分析,解决了该工作弧门在洞内安装的关键施工技术问题。 相似文献
93.
94.
一级开发大柳树高坝原始库容比二级开发小观音高坝多 4 0亿m3 ,库容大带来的好处体现在 5~ 7月可多向下游增供水量 ,缓解下游河道断流 ;延长泄放清水时间 ;增加发电效益 ;满足宁蒙河段防凌要求 ;增加汛期集中泄水 ,减缓下游河道淤积萎缩 ;满足南水北调西线工程水量调节要求等。为了更好优化配置黄河水资源 ,从全局和长远利益考虑 ,应采用一级开发方案 ,修建大柳树高坝大库 相似文献
95.
This paper introduces a new concept of testability called consecutive testability and proposes a design-for-testability method for making a given SoC consecutively testable based on integer linear programming problem. For a consecutively testable SoC, testing can be performed as follows. Test patterns of a core are propagated to the core inputs from test pattern sources (implemented either off-chip or on-chip) consecutively at the speed of system clock. Similarly the test responses are propagated to test response sinks (implemented either off-chip or on-chip) from the core outputs consecutively at the speed of system clock. The propagation of test patterns and responses is achieved by using interconnects and consecutive transparency properties of surrounding cores. All interconnects can be tested in a similar fashion. Therefore, it is possible to test not only logic faults but also timing faults that require consecutive application of test patterns at the speed of system clock since the consecutively testable SoC can achieve consecutive application of any test sequence at the speed of system clock. 相似文献
96.
CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing 总被引:2,自引:0,他引:2
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CAS-BUS that solves some of the new problems the test industry has to deal with. This TAM is scalable, flexible and dynamically reconfigurable. The CAS-BUS architecture is compatible with the IEEE P1500 standard proposal in its current state of development, and is controlled by Boundary Scan features.This basic CAS-BUS architecture has been extended with two independent variants. The first extension has been designed in order to manage SoC made up with both wrapped cores and non wrapped cores with Boundray Scan features. The second deals with a test pin expansion method in order to solve the I/O bandwidth problem. The proposed solution is based on a new compression/decompression mechanism which provides significant results in case of non correlated test patterns processing. This solution avoids TAM performance degradation.These test architectures are based on the CAS-BUS TAM and allow trade-offs to optimize both test time and area overhead. A tool-box environment is provided, in order to automatically generate the needed component to build the chosen SoC test architecture. 相似文献
97.
98.
在KZON-50/120空分设备的安装调试和试运行过程中,对其机械和电器部分进行了多处改造,克服了原设计中存在的不足之处。改造后,机械和电器性能更加趋于合理,操作简单,便于维护,降低了制气费用,提高了制气纯度和经济效益,保证了空分设备更加安全可靠运行。 相似文献
99.
Ryba Nancy L.; Cooper Virginia G.; Zapf Patricia A. 《Canadian Metallurgical Quarterly》2003,34(5):499
What is the current standard of practice for evaluations of juvenile competence to stand trial (JCST)? The present study surveyed psychologists regarding the practices used when conducting JCST evaluations. Respondents rated the importance of 17 elements that might be included in a JCST evaluation report. Of these elements, 7 were considered essential by 70% or more of respondents, with 9 additional elements rated as either essential or recommended. A majority of respondents felt that the use of psychological and forensic instruments was important. A list of tests used is provided, and the implications for the development of standards and policy are discussed to provide practitioners with additional knowledge that will help to further the state of the discipline. (PsycINFO Database Record (c) 2010 APA, all rights reserved) 相似文献
100.