船载卫星通信地球站伺服系统硬件设计

随着通信技术的发展,卫星通信以其克服地形和自然条件限制的良好能力而越来越受到人们的青睐。但是在舰船移动时卫星天线跟踪系统的平台基准线会在方位、俯仰和横滚三个方向上发生偏移。为了解决舰船移动时稳定收发卫星信号的问题,设计了一种基于C8051F020的伺服系统。介绍了天线跟踪方式和硬件系统设计,最后实现稳定跟踪控制功能。实验结果表明,船载伺服系统对于克服载体运动带来的干扰,实现在动载体上稳定收发卫星信号具有重要的意义。     

基于预算机制的非结构化P2P网络分段搜索策略

在非结构化P2P网络中,降低消息冗余,提高搜索的效率,一直是资源搜索的关键问题.目前非结构化P2P网络均采用生存时间（Time-To-Live）机制控制搜索算法的深度,但是同时产生了大量的冗余消息,严重影响了网络的利用率.为了能够在保持高搜索效率的前提下减少冗余消息的数量,提出了一种基于预算机制的非结构化P2P网络分段搜索策略DBudgetSearch.DBudgetSearch将搜索过程分为两个阶段,并在每个阶段中使用预算机制来控制消息转发的数量和导向,根据邻居节点的连接度大小来选择消息的转发对象.分析和试验结果表明,DBudgetSearch导向性好,算法搜索效率高,能够有效减少冗余消息.     

微波能脱除铅锌冶炼中间物料中氟氯的研究进展

根据铅锌冶炼中间物料中的氟、氯主要是以强吸波物相氟氧化铅、氯氧化锌和氯化亚铜等形式存在,而物料其他成分如氧化锌、氧化铅等的吸波性相对较弱。提出了利用微波能选择性、高效脱除铅锌冶炼含氯中间物料中氟氯新工艺。对氧化锌烟尘、锌浮渣和含氯铜渣的研究结果表明：相比其他高温焙烧脱氟氯过程,脱氟氯温度可降低100℃以上,脱氟氯效率高;而且,可以采用气氛调控使脱氟、氯过程产生的尾气易于吸收净化,避免烟气污染。     

基于累加法的高斯白噪声性能分析

基于中心极限定理的累加法,提出了一种新的产生高斯白噪声的方法.首先分析了高斯白噪声的特点,用均匀分布随机序列累加产生高斯分布随机序列,分析其时域和频域特征,并与用 Matlab 里的 randn 函数产生的高斯分布随机序列进行对比.最后用2χ检验法对由累加法产生的高斯分布随机序列进行检验.实验结果表明,累加法产生的随机数十分近似于高斯分布白噪声.     

无胶单面挠性覆铜板与不流动粘结片结合力的考察

文章对刚挠结合印制板用无胶单面挠性覆铜板与不流动粘结片的结合力进行了考察,结果表明增加PI表面粗糙度和减小PI表面接触角可以提高结合力,但一般不大于0．6N／mm;对PI表面进行等离子处理可以将结合力提高到客户要求的大于0．8N／mm;而提高无胶单面挠性覆铜板与不流动粘结片结合力的最有效的方法是使用高锰酸钾溶液对PI进行表面处理,在合适的条件下,结合力可达到1．15N／mm。     

金属阴极真空型紫外探测器光谱响应测试研究

紫外探测相比红外探测的一个重要优势是背景干净,信噪比高.这一优势充分体现的前提是其日盲特性.本文利用光谱测试系统对制作的金属阴极真空紫外探测器的光谱响应进行测试,并将测试结果与传统的碲铷阴极紫外探测器的光谱响应曲线进行对比,比较了这两类器件的紫外日盲特性,发现金属阴极在日盲特性方面有一定的优势,最终指出该类型器件在某些特殊场合的潜在应用.     

Wide division ratio range programmable frequency divider with close-to-50% output duty-cycle

A novel wide division ratio (DR) range programmable frequency divider is presented in this article, which is based on the proposed divide-by-2/3/4 cell. The divider's output is buffered by a divide-by-2 cell; hence, it can achieve the close-to-50% output duty-cycle. The DRs can be set via the convenient provisions of binary bits. When the DR is even, the output duty-cycle is exactly 50%. If the DR is odd, the output duty-cycle is k/(2?k?+?1), where k is a natural number, therefore, it becomes close-to-50% with an increasing k. A divider with eight DR control bits, which can realise the DRs from 8 to 511, is implemented in standard 0.18?µm complementary metal-oxide semiconductor technology, the die area is 0.02?mm². The measured results show that the divider can obtain 44.4–50% output duty-cycle which corroborates with the calculation.     

Effect of Ag doping on the electrical properties of thermally deposited CdS–La2O3 TFTs

This paper describes a new approach for repairing memories. Repair is implemented by deletion of either rows and/or columns on which faulty cells lie. These devices are commonly referred to as redundant memories, because redundant columns and rows are added. A new repair technique and an algorithm are proposed. The algorithm is based on a fault-counting technique and on a reduced-covering approach. The innovative feature is that reduced covering permits an heuristic, but efficient, criterion to be included in the selection of the rows and/or columns to be deleted. This retains independence of the repair process on the distribution of faulty cells in memory, while allowing a good repairability/ unrepairability detection. The main benefits that result by using the proposed repair algorithm are a reduction in execution time to determine the repair-solution for the device under test and its suitability for implementation in a defect analysis system. Illustrative examples and theoretical results are provided to substantiate the validity of the proposed repair technique     

Analysis of ATPMOS configurations-based 4 × 1 multiplexer with estimation of power and delay

In this article, two consecutive augmenting transistor P-channel metal oxide semiconductor (ATPMOS) configurations are proposed. These two ATPMOS configurations (ST ATPMOS and DT ATPMOS) are implemented on a 4 × 1 (multiplexer) mux circuit. Leakage power dissipation, dynamic power dissipation and delay performance parameters are calculated for both (ST ATPMOS and DT ATPMOS) ATPMOS configurations-based 4 × 1 mux circuits at different values of transistor’s width. Due to simulation, it is realised that the leakage power dissipation and dynamic power dissipation are reduced and delay is improved (delay is reduced) in the DT ATPMOS configuration-based mux circuit compared to the ST ATPMOS configuration-based mux circuit. The whole simulation process was carried out in 45-nm technology. The circuits were operated at 1-V power supply.