Gender identity: The benefits of a self-schema approach.

Questions S. L. Bem's (see record 1983-21087-001) definition of a gender schema and argues that male and female sex-typed individuals do not have equivalent gender schemata. The high-androgynous individuals are the only ones for whom both masculinity and femininity are equally available and who might be properly termed "gender schematic." (6 ref) (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

无叶假木贼杀虫有效部位的研究

依次通过酸水煮沸、煤油萃取和不同酸碱度下氯仿萃取煤油层，从无叶假木贼中得到两个提取部位。田间杀虫试验证明其中一部位有良好的杀虫效果。对该杀虫有效部位进行化学成分分析．通过薄层层析和气相色谱-质谱方法，证明有效部位的主要成分是毒藜碱和羽扇豆碱。     

山柰挥发油化学成分的气相色谱/质谱法分析

采用水蒸气蒸馏法提取山柰中的挥发油,经过气相色谱/质谱(GC/MS)联用法分析,鉴定了挥发油中的28个化学成分,其中主要成分有对甲氧基肉桂酸乙酯(59.96%)、肉桂酸乙酯(23.68%)、δ-3-蒈烯(6.61%)等,占挥发油总量的90.25%。     

外语学习中鼓励学习者自主

学习者自主作为一种先进的教学理念．其产生与发展是信息时代发展的需要。本文探讨了鼓励学习者自主的必要性及其方法，确认了教师和学习者在自主学习模式中的新角色。     

Demonstration of logic AND device using a split-gate pentacene field effect transistor

We report on the fabrication and performance of pentacene-based split-gate field effect transistors (FETs) on doped Si/SiO₂ substrates. Several transistors with split gate structures were fabricated and demonstrated AND logic functionality. The transistor’s functionality was controlled by applying either 0 or − 10 V to each of the gate electrodes. When − 10 V was simultaneously applied to both gates, the transistor was conductive (ON), while any other combination of gate voltages rendered the transistor highly resistive (OFF). A significant advantage of this device is that AND logic devices with multiple inputs can be built using a single pentacene channel with multiple gates. The p-type carrier mobility of charge within the pentacene active layer of these transistors was about 10^− 5 cm²/V-s. We attribute the low value of mobility primarily to the sharp contours of the pentacene film between the drain and the source contacts and to defects in the pentacene film. The average charge density was 1.4 × 10¹² holes/cm². Despite low mobility, the devices operated at lower drain-source (V_DS) and gate-source (V_GS) voltages as compared with previously reported pentacene based FETs.     

挤压410L不锈钢金属蜂窝的烧结和组织结构研究

本文采用粉体挤压-烧结工艺制备410L不锈钢金属蜂窝,研究不同的烧结温度和时间条件下烧结蜂窝的收缩率、表观密度和组织结构特征.研究表明,随烧结温度的升高,蜂窝的收缩率和表观密度增大,径向收缩率的变化范围为17%～22%,纵向收缩率的变化范围为11%～19%,表观密度的范围为1.7～2.3g/cm3.随烧结时间的延长,蜂窝的收缩率和表观密度也随之增大,径向收缩率的变化范围为20%～23%,纵向收缩率的变化范围为13%～18%,表观密度的范围为1.8～2.3g/cm3.烧结组织为Fe-Cr固溶体(α-Fe)及第二相颗粒(Fe,Cr)3C和(Fe,Cr)3Si,烧结温度为1235℃、时间为25min最佳.     

不同底层(Ag, Ti, Cu, Pt)对[Fe/Pt]n多层膜磁性的影响

利用磁控溅射的方法, 在热玻璃基片上制备了[Fe/Pt]n多层膜, 经不同温度真空热处理后, 得到L10有序结构的FePt薄膜(L10-FePt).实验结果表明 [Fe/Pt]n多层膜结构可使FePt薄膜的有序化温度由500 ℃降到350 ℃, 350 ℃退火20 min后其平行膜面矫顽力可达到421.8 kA·m-1.同时以Ag, Ti, Cu和Pt做底层, 利用[Fe/Pt]n多层膜结构制备了FePt薄膜, 磁性和X射线衍射结果表明 与[Fe/Pt]n多层膜相比, 四种底层均没有进一步降低FePt薄膜的有序化温度, 其中Ag做底层对[Fe/Pt]n多层膜退火后的平行膜面矫顽力影响较小, 但能够提高其垂直磁各向异性;其他底层均会降低[Fe/Pt]n多层膜在高温退火时的平行膜面矫顽力, 且对其垂直磁各向异性无改善作用.     

带时态算子和H、L算子的Rough逻辑

将线性时态逻辑和带H、L算子的Rough逻辑结合起来，提出了带时态算子和H、L算子的Rough逻辑模型，从而使逻辑由一维变成了二维。     

Parallel Monte Carlo Driver (PMCD)—a software package for Monte Carlo simulations in parallel

Thanks to the dramatic decrease of computer costs and the no less dramatic increase in those same computer's capabilities and also thanks to the availability of specific free software and libraries that allow the set up of small parallel computation installations the scientific community is now in a position where parallel computation is within easy reach even to moderately budgeted research groups. The software package PMCD (Parallel Monte Carlo Driver) was developed to drive the Monte Carlo simulation of a wide range of user supplied models in parallel computation environments. The typical Monte Carlo simulation involves using a software implementation of a function to repeatedly generate function values. Typically these software implementations were developed for sequential runs. Our driver was developed to enable the run in parallel of the Monte Carlo simulation, with minimum changes to the original code that implements the function of interest to the researcher. In this communication we present the main goals and characteristics of our software, together with a simple study its expected performance. Monte Carlo simulations are informally classified as “embarrassingly parallel”, meaning that the gains in parallelizing a Monte Carlo run should be close to ideal, i.e. with speed ups close to linear. In this paper our simple study shows that without compromising the easiness of use and implementation, one can get performances very close to the ideal.     

基于Linux的蓝牙系统核心协议栈的设计与实现

本文设计与实现的基于Linux平台的Bluetooth核心协议栈主要由四个模块组成：服务发现协议SDF模块，逻辑链路控制与适配协议L2CAP模块，串行线路模拟协议RFCOMM模块和主机控制接口HCI模块。在本核心协议栈的设计过程中，始终将提高整个协议栈的执行效率作为第一目标。为提高协议栈的效率，对协议栈进行了设计优化，采用了状态自动机、散列技术、缓冲机制、开放式平台、硬件模拟技术等一些先进技术。