VLSI Implementation of Forward Error Control Technique for ATM Networks

In asynchronous transfer mode (ATM) networks, fixed length cells of 53 bytes are transmitted. A cell may be discarded during transmission due to buffer overflow or a detection of errors. Cell discarding seriously degrades transmission quality. The quality degradation can be reduced by employing efficient forward error control (FEC) to recover discarded cells. In this paper, we present the design and implementation of decoding equipment for FEC in ATM networks based on a single parity check (SPC) product code using very‐large‐scale integration (VLSI) technology. FEC allows the destination to reconstruct missing data cells by using redundant parity cells that the source adds to each block of data cells. The functionality of the design has been tested using the Model Sim 5.7cXE Simulation Package. The design has been implemented for a 5 ° 5 matrix of data cells in a Virtex‐E XCV 3200E FG1156 device. The simulation and synthesis results show that the decoding function can be completed in 81 clock cycles with an optimum clock of 56.8 MHz. A test bench was written to study the performance of the decoder, and the results are presented.     

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从业主的角度说明了对工程全过程的工程造价进行管理与控制,有效地降低成本,提高投资收益。     

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Exoatmospheric interception problem solved using output feedback law

Interception problems are often dealt with by separating guidance and autopilot design. Guidance law can be obtained using optimal control theory and autopilot design is performed on a linearized system. In this paper, we introduce a new approach that determines a global guidance and autopilot law, based on direct output feedback design. Application of this method to exoatmospheric interception problem results in good performances. Extension to endoatmospheric case is under investigation.     

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