一种军棋机器博弈的多棋子协同博弈方法

针对在军棋博弈不完全信息对弈中，面对棋子不同价值、不同位置、不同搭配所产生的不同棋力，传统的单子意图搜索算法，不能满足棋子之间的协同性与沟通性，同时也缺乏对敌方的引诱与欺骗等高级对抗能力。本文提出一种结合UCT搜索策略的高价值棋子博弈方法，实现高价值棋子协同博弈的策略。实战经验表明:高价值多棋子军棋协同博弈策略优于单棋子军棋博弈策略。     

因素空间理论下基点分类算法研究

目前，基于因素空间理论的背景基提取算法计算过程复杂，初始化必须依赖各因素极值，基点数量提取冗余等原因，未能在应用中取得很好效果。为此，结合内点判别法和知识可继承、可扩展的思想，提出一种计算简单、初始化独立、基点数量小的改进的背景基提取算法。然后，利用改进的背景基提取算法构造出一种全新的数据分类算法-基点分类算法，基点分类算法以提取每一类样本的背景基为预测模型，再通过新定义的λ-背景基，优化预测模型。数值实验表明:基点分类算法原理简单、构造难度小、分类模型泛化能力强，预测能力准确率高，同时严格的模型限定区域又能为识别新类别提供新方法。     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

一种改进的新三步搜索算法

在对三步法工作原理进行研究的基础上提出了新三步搜索算法（NITSS）。该方法充分利用视频序列运动矢量概率分布上的中心偏置特性．在三步搜索算法的基础上引入了十字型分布的4个点构成搜索点群。实验结果表明。新三步搜索算法解决了三步法的小运动估计效果较差问题．提高了搜索精度，保持了三步法的高效率。     

An effective coding approach for multiobjective integrated resource selection and operation sequences problem

In this paper, we consider an integrated Resource Selection and Operation Sequences (iRS/OS) problem in Intelligent Manufacturing System (IMS). Several kinds of objectives are taken into account, in which the makespan for orders should be minimized; workloads among machine tools should be balanced; the total transition times between machines in a local plant should also be minimized. To solve this multiobjective iRS/OS model, a new two vectors-based coding approach has been proposed to improve the efficiency by designing a chromosome containing two kinds of information, i.e., operation sequences and machine selection. Using such kind of chromosome, we adapt multistage operation-based Genetic Algorithm (moGA) to find the Pareto optimal solutions. Moreover a special technique called left-shift hillclimber has been used as one kind of local search to improve the efficiency of our algorithm. Finally, the experimental results of several iRS/OS problems indicate that our proposed approach can obtain best solutions. Further more comparing with previous approaches, moGA performs better for finding Pareto solutions. Received: May 2005/Accepted: December 2005     

马钢二烧结配料计算机控制系统

阐明了马钢二烧结配科计算机控制系统的目的、控制形式、控制原理；根据烧结配料控制对象的特点对信号采样和控制算法进行了探讨；提供了系统的主要硬件结构，软件功能和程序框图。     

A Least Squares Approach to Escalator Algorithms for Adaptive Filtering

In this paper, we introduce an escalator (ESC) algorithm based on the least squares (LS) criterion. The proposed algorithm is relatively insensitive to the eigenvalue spread ratio (ESR) of an input signal and has a faster convergence speed than the conventional ESC algorithms. This algorithm exploits the fast adaptation ability of least squares methods and the orthogonalization property of the ESC structure. From the simulation results, the proposed algorithm shows superior convergence performance.     

USB数据传输中CRC校验码的并行算法实现

文章介绍了用于USB总线数据传输的CRC校验的原理和算法，并且采用并行电路实现USB2．0中的CRC产生和CRC校验，与传统的串行电路实现相比，并行电路实现方法虽然在芯片面积上大于串行电路实现，但由于降低了时钟频率，电路更容易综合实现，并且大大降低了功耗，有利于低功耗电路设计。     

基于进化算法的常减压装置模拟

提出了基于优选优生进化算法（Select—best and prepotency evolution algorithm，SPEA）的常减压装置模拟方法。以各塔的温度分布为目标，基于生产过程和分析数据，采用SPEA确定各塔板Murphree效率，从而精确描述各塔板平衡偏离程度。在实际应用中，获得具有良好精度的常减压装置模型。系统分析了SPEA算法的关键参数——优选领域大小与计算复杂性及寻优性能之间的关系，结果显示其取值为群体规模的10％最为合适。     

一种高精度的非平稳随机信号实时建模算法研究

针对传统的非平稳随机信号时变参数筹分模型算法的不足,论文把非平稳随机信号时变参数差分模型与一种带自适应遗忘因子的RLS算法结合起来,形成一种有效的非平稳随机信号实时建模算法,仿真分析表明该算法不仅能获得快的收敛速度而且能获得高的建模精度。