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81.
电力系统无功电压最优控制被认为是一个多级、多目标的大规模控制问题。针对陕西电网的实际情况,分析了现有无功优化分级控制模式的优缺点,选择了适合于陕西电网长远发展需要的控制模式。在数学模型上,结合电压稳定的概念,给出电压稳定约束下限,作为无功优化的约束条件进行优化计算。最后,结合陕西电网的实际情况,对陕西电网的自动电压控制(AVC)系统提出了建设框架和具体实施建议。  相似文献   
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简单利用插值恢复丢失宏块的运动矢量一般存在较大误差,运动补偿后边界存在明显痕迹.文章针对H.264/AVC的特点,提出了一种自适应时域错误隐藏方法.首先利用丢失宏块周围4×4块的运动矢量寻找视频内容分裂处,划分运动矢量相似区,再根据运动矢量相似区的划分自适应的进行错误隐藏,因此对丢失宏块有更好的恢复效果.实验结果验证了该方法的优越性.  相似文献   
84.
基于DM642平台的视频会议中H.264/AVC编码器优化   总被引:1,自引:1,他引:0  
针对视频会议系统应用,基于DM642平台进行了H.264/AVC编码器的优化.优化过程分为三步,首先是编码体系结构的选择及功能裁剪,其次是对运动估计算法进行优化,最后是针对平台的优化.在DM642平台上进行了测试,实现了20 f/s CIF(352×288)格式图像的实时编码.  相似文献   
85.
提出了一种用于H.264/AVC编解码器的通用并行变换结构,并利用Verilog语言进行了电路设计.该并行结构主要包含4个移位器和16个累加器,可以完成H.264/AVC中的全部4×4变换,包括4×4哈达马变换和4×4离散余弦变换和反变换,能够达到每个时钟周期处理一个像素点的速度.使用SMIC 0.18 μm工艺对该并行结构进行了综合,电路面积为3757门,工作在100 MHz时钟频率下的关键路径为10.3 ms.  相似文献   
86.
H.264/AVC与以往的视频标准(H.261、H.263、MPEG-1、MPEG-2等)相比。在算法上有着许多改进,能够在提供更高压缩率的同时提供更好的图像质量。打分过程是一种提高压缩率、保证编码质量的优化算法。本文主要介绍基于H.264标准的编码器中打分过程的算法原理及其硬件实现。  相似文献   
87.
Several specific features have been incorporated into Motion estimation (ME) in H.264 coding standard to improve its coding efficiency. However, they result in very high computational load. In this paper, a fast ME algorithm is proposed to reduce the computational complexity. First, a mode discriminant method is used to free the encoder from checking the small block size modes in homogeneous regions. Second, a condensed hierarchical block matching method and a spatial neighbor searching scheme are employed to find the best full-pixel motion vector. Finally, direction-based selection rule is utilized to reduce the searching range in sub-pixel ME process. Experimental results on commonly used QCIF and CIF format test sequences have shown that the proposed algorithm achieves a reduction of 88% ME process time on average, while incurring only 0.033 dB loss in PSNR and 0.50% increment on the total bit rate compared with that of exhaustive ME process, which is a default approach adopted in the JM reference software.  相似文献   
88.
Although most of the proposals for implementing motion-compensated temporal filtering (MCTF) schemes are based on the wavelet transform, in this paper, we propose an MCTF framework based on the discrete cosine transform (DCT). Using DCT decimation and interpolation, several temporal decomposition structures named motion-compensated DCT temporal filters (MCDCT-TF) are introduced. These structures are able to employ filters of any length with particular emphasis on 5/3 DCT and 7/4 DCT. The proposed MCDCT-TF and the two-dimensional (2D) DCT decimation technique are incorporated into H.264/AVC to provide spatio-temporal scalability. Compared with the current MCTF-based lifting schemes such as Haar, and 5/3 wavelet filters, simulation results show that the proposed MCDCT-TF utilizing longer tap DCT filters achieves a significant improvement in coding gain. The impact of odd/even group of frames, the decimation/interpolation ratios, and motion-compensated connectivity on the MCDCT-TF performance are also analyzed. Moreover, simulation results show that the performance of the presented scalable video coding is close to the single layer H.264/AVC and is slightly inferior to the temporal scalability supported in JSVM, the state-of-the-art scalable video coding standard, that gets its gain from Hierarchical B-pictures. However, our spatio-temporal coding scheme outperforms the spatio-temporal supported in JSVM even if it uses hierarchical B-pictures to improve its gain.  相似文献   
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We present a full HD (1080p) H.264/AVC High Profile hardware encoder based on fast motion estimation (ME). Most processing cycles are occupied with ME and use external memory access to fetch samples, which degrades the performance of the encoder. A novel approach to fast ME which uses shared multibank memory can solve these problems. The proposed pixel subsampling ME algorithm is suitable for fast motion vector searches for high‐quality resolution images. The proposed algorithm achieves an 87.5% reduction of computational complexity compared with the full search algorithm in the JM reference software, while sustaining the video quality without any conspicuous PSNR loss. The usage amount of shared multibank memory between the coarse ME and fine ME blocks is 93.6%, which saves external memory access cycles and speeds up ME. It is feasible to perform the algorithm at a 270 MHz clock speed for 30 frame/s real‐time full HD encoding. Its total gate count is 872k, and internal SRAM size is 41.8 kB.  相似文献   
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