Machining with tool–chip contact on the tool secondary rake face—Part II: analysis and discussion

The forces, chip thickness, and natural tool–chip contact length in machining with a double-rake-angled tool are predicted in Part II of the present study. It is revealed that in comparison with a single-rake-angled tool, a double-rake-angled tool increases the forces, especially the thrust force. However, the increase in chip thickness and tool–chip contact length is not significant under the input conditions specified in the present study. The effect of seven input variables of the proposed model is quantitatively investigated. The predicted variations of forces, chip thickness, and natural tool–chip contact length are in good agreement with theoretical and experimental results obtained by other researchers. The interrelationships among the resultant force, the chip thickness, and the natural tool–chip contact length are established, which provides a new and promising method to estimate the tool–chip contact length by employing the resultant force. It is demonstrated that the model can also be extended to study the problem of machining with a groove-type chip breaker tool.     

多功能DBHTV传输短节的设计与开发

简要介绍了多功能井下超声成像测井仪的总体构思，然后较详细地阐述了其中的一个关键部分-传输短节的设计与开发过程。在短节中应用了单片机系统和FPGA技术，实现了一种包括大数据量井下超声成像测井仪在组合测井新方法，为今后井下超声成像测井仪的发展拓宽了道路。     

微控制器与嵌入式RISC处理器的发展现状

综述了新一代微控制器与嵌入式RISC处理器的主要特点和发展方向；详细介绍了目前国内外最流行的不同字长的系列机种、结构特点、专有特性及系统应用等；最后预测了它们的世界销售市场与国内发展前景。     

PIC单片机在激光电源中的应用研究

论述了单片机控制激光电源的原理，提出了产生PWM控制的基本思想及整个控制系统的硬件组成和软件设计方法。     

2.5Gb/s和3.125Gb/s速率级0.35μmCMOS限幅放大器

采用了TSMC0.35μm CMOS工艺实现了可用于SONET/SDH2.5Gb/s和3.125Gb/s速率级光纤通信系统的限幅放大器。通过在芯片测试其最小输入动态范围可达8mVp—p，单端输出摆幅为400mVp-p，功耗250mW，含信号丢失检测功能，可以满足商用化光纤通信系统的使用标准。     

Z900MCM综述

介绍了Z900 MCM设计和布局,可控塌陷芯片连接(C4)工艺在Z900 MCM组装中的应用。从设计上通过加入垂直电感器及去耦电容器减小其噪声。通过基板测试和功能测试,剔除有缺陷的基板和芯片。Z900 MCM采用先进的MCM—D技术和MCM返工及冷却技术。Z900 MCM平均无故障时间高达40年。     

Formation of low-resistivity poly-Si and SiNx films by Cat-CVD for ULSI application

In this paper, bulk-Si metal–oxide–semiconductor field effect transistors (MOSFETs) are fabricated using the catalytic chemical vapor deposition (Cat-CVD) method as an alternative technology to the conventional high-temperature thermal chemical vapor deposition. Particularly, formation of low-resistivity phosphorus (P)-doped poly-Si films is attempted by using Cat-CVD-deposited amorphous silicon (a-Si) films and successive rapid thermal annealing (RTA) of them. Even after RTA processes, neither peeling nor bubbling are observed, since hydrogen contents in Cat-CVD a-Si films can be as low as 1.1%. Both the crystallization and low resistivity of 0.004 Ω·cm are realized by RTA at 1000 °C for only 5 s. It is also revealed that Cat-CVD SiN_x films prepared at 250 °C show excellent oxidation resistance, when the thickness of films is larger than approximately 10 nm for wet O₂ oxidation at 1100 °C. It is found that the thickness required to stop oxygen penetration is equivalent to that for thermal CVD SiN_x prepared at 750 °C. Finally, complementary MOSFETs (CMOSs) of single-crystalline Si were fabricated by using Cat-CVD poly-Si for gate electrodes and SiN_x films for masks of local oxidation of silicon (LOCOS). At 3.3 V operation, less than 1.0 pA μm⁻¹ of OFF leakage current and ON/OFF ratio of 10⁷–10⁸ are realized, i.e. the devices can operate similarly to conventional thermal CVD process.     

A One‐Kilobit PQR‐CMOS Smart Pixel Array

The photonic quantum ring (PQR) laser is a three dimensional whispering gallery (WG) mode laser and has anomalous quantum wire properties, such as microampere to nanoampere range threshold currents and √T‐dependent thermal red shifts. We observed uniform bottom emissions from a 1‐kb smart pixel chip of a 32×32 InGaAs PQR laser array flip‐chip bonded to a 0.35 µm CMOS‐based PQR laser driver. The PQR‐CMOS smart pixel array, now operating at 30 MHz, will be improved to the GHz frequency range through device and circuit optimization.     

10 Gb/ s 0. 18 􀀁m CMOS 激光二极管驱动器芯片

基于0．18μm CMOS工艺设计的10Gb／s激光二极管驱动器电路。核心单元为两级直接耦合的差分放大器，电路中采用了并联峰化技术和放大级直接耦合技术以扩展带宽，降低功耗。模拟结果表明，在1．8V电源电压作用下该电路可工作在10Gb／s速率上，输入单端峰峰值为0．3V的差分信号时，在单端50Ω负载上的输出电压摆幅可达到1．4V，电路功耗约为85mW。     

从数字看发展片式电容器面临的机遇与挑战

采用海关进、出口统计和行业生产统计资料,通过计算、分析,用数字来说明国内发展片式多层陶瓷电容器、片式钽电解电容器、片式铝电解电容器、片式有机薄膜电容器所面临的机遇与挑战,并对其国内市场需求总量、额,国产品在国内市场占有率等做出评估,为有关单位了解片式电容器的发展提供参考,为国产产品更有效地进入国内市场、促进其发展提供依据。