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认知无线电网络路由研究综述 总被引:5,自引:0,他引:5
在对近期认知无线电网络路由研究成果进行研究的基础上,从邻居节点发现、“耳聋”、邻居节点消失、路由发现和跨层设计等5个方面,对认知无线电网络路由研究面临的重要挑战进行了分析;从研究方法的角度,对路由研究中对公共控制信道的依赖、路径延时,以及需要考虑的技术指标进行了讨论。最后,从介质、信道、节点和网络等4个方面,对路由研究场景设计进行了归纳总结;并从路由优化方案和路由拓扑算法协议两个方面,对主要研究成果进行了分析和讨论。 相似文献
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LEO卫星网络中一种安全的按需路由协议 总被引:1,自引:0,他引:1
低地球轨道(LEO)卫星网络的路由是当前卫星通信领域的研究热点,其安全问题也日益受到研究人员的重视。本文通过分析LEO卫星网络按需路由协议面临的安全威胁,使用基于身份的签密方案,提出了一种适合卫星网络拓扑特性的安全的按需路由协议。针对协议的密码算法处理时间开销较大的特点,设计了自适应的概率性延迟验证机制,能够降低协议的平均路由建立时间。安全性分析和仿真实验结果表明,该协议能够抵抗多种外部攻击行为,以有限的路由建立时间和路由开销为代价,保证了稳定的包传输率。 相似文献
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The varying population density leads to imbalanced utilization rate of satellites. To ensure an intelligent engineering of traffic over satellite networks, a distributed routing scheme for single-layered satellite network, load balancing routing protocol based on mobile agent (LBRP-MA) is proposed. For LBRP-MA, mobile agents explore route by migrating autonomously. Upon arriving at destination, mobile agents migrate back. On each intermediate satellite, mobile agents evaluate path cost considering satellite geographical position as well as inter-satellite link (ISL) cost, and finally take ISL congestion index into account to update routing tables. Through simulations on the Courier-like constellation, the proposed approach is shown to achieve guaranteed end-to-end delay bound and decrease packet loss ratio with better throughput, which is especially suitable for data transferring in case of high traffic load. Moreover, results of the complexity analysis demonstrate that LBRP-MA can have low onboard signaling, storage and computation requirements. Furthermore, issues of LBRP-MA such as ISL congestion index and cost modification factor are discussed. 相似文献
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Ad hoc网络安全与攻击探讨 总被引:6,自引:0,他引:6
介绍了Ad hoc网络的体系结构和特点,分析了其存在的网络安全问题,总结了对Ad hoc网络的多种攻击方法,并提出了几种改善Ad hoc网络安全的策略。 相似文献
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A resource-efficient and scalable wireless mesh routing protocol 总被引:3,自引:0,他引:3
By binding logic addresses to the network topology, routing can be carried out without going through route discovery. This eliminates the initial route discovery latency, saves storage space otherwise needed for routing table, and reduces the communication overhead and energy consumption. In this paper, an adaptive block addressing (ABA) scheme is first introduced for logic address assignment as well as network auto-configuration purpose. The scheme takes into account the actual network topology and thus is fully topology-adaptive. Then a distributed link state (DLS) scheme is further proposed and put on top of the block addressing scheme to improve the quality of routes, in terms of hop count or other routing cost metrics used, robustness, and load balancing. The network topology reflected in logic addresses is used as a guideline to tell towards which direction (rather than next hop) a packet should be relayed. The next hop is derived from each relaying node’s local link state table. The routing scheme, named as topology-guided DLS (TDLS) as a whole, scales well with regard to various performance metrics. The ability of TDLS to provide multiple paths also precludes the need for explicit route repair, which is the most complicated part in many wireless routing protocols. While this paper targets low rate wireless mesh personal area networks (LR-WMPANs), including wireless mesh sensor networks (WMSNs), the TDLS itself is a general scheme and can be applied to other non-mobile wireless mesh networks. 相似文献
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Merging 1-bit flip-flops into multi-bit flip-flops in the post-placement stage is one of the most effective techniques for minimizing clock power. In this work, we introduce a new style of multi-bit flip-flop, called loosely coupled multi-bit flip-flop (LC-MBFF). The merit of LC-MBFF is that the logically constituent 1-bit flip-flops in LC-MBFF can be physically apart (i.e., no relocation), providing no need to set aside white space. Utilizing LC-MBFFs, we propose a multi-bit flip-flop allocation algorithm which fully explores the diverse allocation of LC-MBFF structures to maximally reduce clock power consumption. Experimental results with ISCAS89 and IWLS2005 benchmark circuits show that our proposed allocation algorithm using the newly designed multi-bit flip-flops is able to reduce on average the clock power by 8.51% while the best known multi-bit flip-flop allocation algorithm [7] reduces by 5.37%. Additionally, we extend our algorithm to support the multi-bit flip-flop allocation for circuits with clock polarity assignment. 相似文献