Energy reduction through crosstalk avoidance coding in networks on chip

Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near future. With this ever increasing degree of integration, design of communication architectures for large, multi-core SoCs is a challenge. Traditional bus-based systems will no longer be able to meet the clock cycle requirements of these big SoCs. Instead, the communication requirements of these large multi processor SoCs (MP-SoCs) are convened by the emerging network-on-chip (NoC) paradigm. Crosstalk between adjacent wires is an important signal integrity issue in NoC communication fabrics and it can cause timing violations and extra energy dissipation. Crosstalk avoidance codes (CACs) can be used to improve the signal integrity by reducing the effective coupling capacitance, lowering the energy dissipation of wire segments. As NoCs are built on packet-switching, it is advantageous to modify data packets by including coded bits to protect against the negative effects of crosstalk. By incorporating crosstalk avoidance coding in NoC data streams and organizing the CAC-encoded data packets in an efficient manner, so that total number of encoding/decoding operations can be reduced over the communication channel, we are able to achieve lower communication energy, which in turn will help to decrease the overall energy dissipation.     

提高盲源分离算法有效性的研究与应用

基于信息最大化（Informax）的独立分量分析（independent component analysis-ICA）盲源分离（blind source separation-BSS）算法中,采用现有的非线性转换函数,算法的收敛速度慢、串扰大,分离结果不确定。针对这些不足,本文设计了新的分离函数、推导出新的分离矩阵,并进行了仿真,实验结果验证了：采用新算法可使BSS速度加快、分离后语音信号串扰减小,并在一定程度上解决了BSS排序不确定的问题。     

深亚微米SoC芯片物理设计中基于串扰的时序收敛方法

当芯片设计进入深亚微米，串扰效应引起大量的设计违规，尤其是对时序收敛产生很大的影响。实际上串扰对电路时序性能的影响非常难估计，它不仅取决于电路互联拓扑，而且还取决于连线上信号的动态特征。文章从串扰延时的产生原因开始分析，并提出了在O．18μm及以下工艺条件下对串扰延时进行预防．分析和修复的时序收敛方法。     

一种低功耗抗串扰的自适应时空总线编码方法

深亚微米片上总线的功耗、布线面积约束和线间串扰是限制总线数据吞吐率的关键因素,为此该文提出一种自适应时空编码方法以降低总线的串扰延迟和功耗。该方法首先采用空间编码将总线分割为两个子总线,从而减小了恶性串扰发生几率;然后通过恶性串扰判决器分别判断子总线的原码数据及反码数据是否存在恶性串扰:对于任意子总线的原码数据与反码数据均存在恶性串扰的情况,传送屏蔽字;否则,选取无恶性串扰且动态功耗小的总线数据形式并传送。采用SPEC标准数据源对算法进行了评估,该方法在消除恶性串扰的同时使总线数据吞吐率提高了62.59%~81.62%,功耗比同类方法降低14.63%~54.67%,对于32位数据总线,仅需7根冗余线,在动态功耗、布线资源和性能方面获得了有效的优化。     

衬底材料对微带线间串扰耦合的影响研究

随着系统频率的提高,衬底材料特性已成为影响信号走线之间串扰的一个不可忽略的因素。该文基于传输线方程和频域S参数对两平行微带线间串扰耦合进行理论分析,并结合全波3维电磁场仿真工具对具有不同介电常数和不同厚度的衬底材料进行了仿真和分析,得到了微带线在不同衬底下的电场分布,以及近端和远端串扰随频率、衬底介电常数和厚度变化的曲线。随着频率的增大,远端串扰将大于近端串扰,并且随着衬底介电常数和厚度的增加,微带线间的串扰呈现正弦上升的变化趋势。     

Analysis of crosstalk in HgCdTe p-on-n heterojunction photovoltaic infrared sensing arrays

In this paper, an experimental and theoretical study is carried out of crosstalk between nearest-neighbor devices within a backside-illuminated linear HgCdTe photovoltaic infrared sensing array. The dominant form of crosstalk that occurs in high performance photovoltaic arrays is associated with photogenerated minority carriers that diffuse laterally between adjacent devices within the array. To measure crosstalk, a scanning laser microscope is used to obtain a spatial map of spot-scan photoresponse at a temperature of 80K for individual p-on-n photovoltaic devices within the linear array. These experimental results are compared to calculations performed on a commercial two-dimensional device simulation package. The crosstalk measurements and calculations presented in this paper include results on mid-wavelength infrared planar device structures, as well as long-wavelength infrared mesa-isolated devices, which give measured crosstalk values of 6.2 and 8.3%, respectively. The results indicate that the device simulations are in good agreement with experimental results. Further simulations are carried out to determine the sensitivity of crosstalk to various material and device parameters such as epitaxial layer thickness (7 to 25 μm), illumination wavelength (1.047 to 11.0 μm), minority carrier diffusion length (8 to 90 μm), and diode pitch. It is found that the dominant feature influencing the value of crosstalk is the distance between the region of photogeneration and the collecting p-n junction.     

一种新的集成电路互连线串扰模型和估计公式

建立了一个考虑分布电阻,分布电容的互连线混П模型,在这个模型的基础上,分析了终端在最坏条件下的串扰响应,并推导了三阶S域系数的精确表达式,最终,获得了一个新的互连线串扰响应的估计公式,通过与SPICE模拟的结果相比较,该文的模拟结果非常接近实际电路的串扰响应,与相关文献所发表的结果相比较,该模型更符合实际情况,结果也更精确。     

Timing-driven MultiChip Module routing algorithm with crosstalk consideration

This paper presents a timing-driven MultiChip Module （MCM） routing algorithm considering crosstalk, which maximizes routing density while minimizing vias and total wire length. The routing algorithm allows a more global solution as well as the incorporation of more accurate crosstalk modeling. In addition, various time domain characteristics of MCM are analyzed in this contribution. A deembedding technique for the S-parameter calculation is presented and functions for the time-domain signals are investigated in order to decrease the computation time. Routing results show that the proposed algorithm consistently produces the better results than other previously proposed routers while offering flexibility for future incorporation of noise and delay constraints.     

SAC-OCDMA系统中AWG的应用及串扰分析

概述了阵列波导光栅的特点及其在谱域幅度编码的光码分多址通信系统中的应用。基于地址码M序列,采用数值计算的方法,分析了阵列波导光栅的串扰对谱域幅度编码的光码分多址通信系统误码率性能的影响。结果表明,当阵列波导光栅的串扰较小时(Rc=-27dB),谱域幅度编码的光码分多址通信系统具有较好的性能;而当其串扰较大时(Rc=-20dB),谱域幅度编码的光码分多址系统的性能明显恶化,成为影响谱域幅度编码光码分多址通信系统性能的一个重要因素。     

使用双绞差分结构减小印刷电路板上的串扰和辐射发射

随着发展的需要,高速数字电路PCB板上信号速度越来越快,由于差分信号有较强的抗干扰能力,因此用的得越来越普遍。但是,随着上升时间的进一步减小,差分信号的信号完整性问题也变得越来越重要。由于双绞的结构在一定程度上使得干扰相互抵消,从而提高系统对串扰和辐射发射的抵抗能力,因此,近两年来有一种新的双绞差分传输线被引入到布线中。本文从理论上分析了双绞差分线结构减小串扰和辐射发射的机理,并且通过建模仿真验证了其正确性．