基于薄膜SOI材料的GaN外延生长应力释放机制

本文研究了SOI衬底上采用MOCVD方法生长GaN材料的应力释放机制.采用SIMOX工艺制备的具有薄膜顶层硅的SOI材料作为外延生长的衬底材料,采用MOSS在位检测系统以及拉曼测试作为GaN内部应力的表征手段.结果表明,SOI材料对硅基GaN异质外延中的晶格失配应力和热应力的释放都有显著作用.薄膜SOI材料通过顶层硅与外延层的界面滑移,将一部分晶格失配应力通过界面的滑移释放,并且通过柔性薄膜顶层硅自身的应力吸收作用,将一部分热失配应力转移到衬底,从而有效地降低了GaN外延层的张应力.     

激光剥离技术制备GaN/metal/Si的结构和光学特性研究

采用激光剥离技术结合金属熔融键合技术将生长在蓝宝石衬底上的GaN外延层转移到Si衬底上.GaN和Si表面分别用电子束蒸发Al/Ti/Au和Ti/Au/In后,在氮气环境下200℃加压实现GaN和Si的键合.采用脉冲宽度30 ns、波长248 nm的准分子脉冲激光透过蓝宝石衬底辐照GaN薄膜,在脉冲激光能量密度为380 mJ/cm2的条件下将蓝宝石衬底剥离下来,实现GaN薄膜向Si衬底的转移.样品截面显微镜和扫描电镜(SEM)照片说明经过键合工艺形成了致密的GaN/Al/Ti/Au/In/Au/Ti/Si结构.对转移衬底后的GaN薄膜进行原子力显微镜(AFM)和光致发光谱(PL)测试,结果表明金属熔融键合和激光剥离工艺没有对GaN薄膜的结构和光学特性带来明显的不利影响.     

Real-time monitoring of the surface stoichiometry during molecular beam epitaxy of cubic GaN on (001) GaAs by RHEED

We study the plasma-assisted molecular beam epitaxy of cubic GaN on GaAs(OOl) substrates by means ofin-situ reflection high-energy electron diffraction. The epilayers are characterized by x-ray diffraction, photoluminescence, and Hall measurements, and it is found that the overall best films are grown under a N/Ga ratio close to one. For anin-situ determination of the N/Ga ratio, the growth kinetics is studied via surface reconstruction transitions. The effective N flux giving rise to growth is measured using the transient behavior of the half-order diffraction streak intensity for various plasma operating conditions.     

High selectivity plasma etching of InN over GaN

Etch selectivities for InN over GaN as high as 40 and 100 are achieved in BBr₃/Ar and BI₃/Ar, respectively, under inductively coupled plasma conditions. Previous work on Cl₂-based plasma chemistries has produced selectivity in the reverse direction, i.e., GaN over InN, and therefore the introduction of these new Br₂- and I₂-based mixtures facilitates device fabrication involving double heterostructures of GaN/In_xGa_1−xN/GaN. Selectivities up to 10 for InN over the common mask materials SiO₂ and SiN_x were obtained in both BI₃ and BBr₃.     

Characterization of reactive ion etching-induced damage to n-GaN surfaces using schottky diodes

Dry etch-induced damage has been investigated using Pd Schottky diodes fabricated on n-type GaN surfaces that were etched by reactive ion etching in SiCl₄ and Ar plasmas. Damage was evaluated by measuring the current-voltage, current-voltage-temperature, and capacitance-voltage characteristics of the diodes. A plasma chemistry that includes a chemical etching component (SiCl₄) was found to significantly reduce the degree of induced damage in comparison to a chemistry that uses only a physical component (Ar). The effective barrier height, ideality factor, reverse breakdown voltage, reverse leakage current, and the effective Richardson coefficient of diodes etched under various plasma conditions are presented. The degree of etch-induced damage was found to depend strongly on the plasma self-bias voltage but saturates with etch time after an initial two-minute etch period. Rapid thermal annealing was found to be effective in improving the diode characteristics of the etched GaN samples.     

Si-implantation activation annealing of GaN up to 1400°C

Implant activation annealing of Si-implanted GaN is reported for temperatures from 1100 to 1400°C. Free electron concentrations up to 3.5×10²⁰ cm⁻³ are estimated at the peak of the implanted profile with Hall mobilities of ∼60 cm²/Vs for annealing at 1300°C for 30 s with an AIN encapsulant layer. This mobility is comparable to epitaxial GaN doped at a similarly high level. For annealing at ≥1300°C, the sample must be encapsulated with AIN to prevent decomposition of the GaN layer. Channeling Rutherford backscattering demonstrates the partial removal of the implant damage after a 1400°C anneal with a minimum channeling yield of 12.6% compared to 38.6% for the as-implanted spectrum. Scanning electron microscope images show evidence of decomposition of unencapsulated GaN after a 1300°C anneal and complete sublimation after 1400°C. The use of AIN encapsulation and annealing at temperatures of ∼1300°C will allow the formation of selective areas of highly doped GaN to reduce the contact and access resistance in GaN-based transistors and thyristors.     

Improvement of metal-semiconductor-metal GaN photoconductors

Metal-semiconductor-metal photoconductors made on GaN usually exhibit a slow response time and a low responsivity. We have carried out a systematic study on the performance of the photoconductors made from GaN grown by metalorganic chemical vapor deposition using different growth conditions and have found that both response time and responsivity of the GaN detector are improved when the material is grown using increased ammonia flow rates. The best GaN ultraviolet photoconductive detector shows a response time of 0.3 ms and a responsivity of 3200 A/W at 365 nm under an operation bias of 10 V. We attribute this improvement to the reduction of the point defects in GaN.     

Performance enhancement of GaN-based light emitting diodes by transfer from sapphire to silicon substrate using double-transfer technique

ABSTRACT: GaN-based light emitting diodes (LEDs) fabricated on sapphire substrates were successfully transferred onto silicon substrates using a double-transfer technique. Compared with the conventional LEDs on sapphire, the transferred LEDs showed a significant improvement in the light extraction and thermal dissipation, which should be mainly attributed to the removal of sapphire and the good thermal conductivity of silicon substrate. Benefited from the optimized wafer bonding process, the transfer processes had a negligible influence on electrical characteristics of the transferred LEDs. Thus, the transferred LEDs showed a similar current-voltage characteristic with the conventional LEDs, which is of crucial importance for practical applications. It is believed that the double-transfer technique offers an alternative way to fabricate high performance GaN-based thin-film LEDs.     

Measurements and modelling of thermal step current in GaN/SiO2/Si structure

In this work, we report results of measurement of space charge in GaN/SiO₂/Si structure by means of thermal step method (TSM) and capacitance-voltage (C-V). TSM is a non destructive method for quantifying and localizing the electric charges in insulating materials. Its principle consists to apply a low thermal step to a short-circuited or dc-biased sample and to record a current response, which depends on the charge present in the device. The C-V characteristics show an almost metal-oxide-semiconductor (MOS) behaviour and retention of charges after forward bias sweeping. The space charge dynamics in the structure are followed under low applied dc voltages. Results show a significant inversion of the TSM currents above applied voltage of 200 mV. A theoretical model is then presented in order to estimate the amount of the trapped charges and to interpret the variation of the TS currents as a function of the applied gate voltages.