Ellipsometric investigation of the mechanism of the formation of titanium oxynitride nanolayers

The formation mechanism of insulating titanium oxynitride nanolayers was studied by means of spectroscopic ellipsometry. The parameters of the model for solving the inverse problem of ellipsometry were chosen on the basis of experimental data obtained with the help of high-resolution transmission electron microscopy, atomic force microscopy, UV and X-ray photoemission spectroscopy. The layers were obtained using the plasmachemical nitridation of thin titanium layers on silicon substrate. The features of nanolayer preparation procedure (low temperature and short process time), as well as good masking characteristics (the minimal density of pores and defects, and the perfect smoothness of the surface) allow one to use these layers for chemical and electron passivation and stabilization of the surface of semiconductor nano-objects (quantum dots, quantum wires, nanowhiskers etc.) for electron and photon nanodevices.     

Atomic layer deposition of high capacitance density Ta2O5-ZrO2 based dielectrics for metal-insulator-metal structures

We have investigated electrical properties of laminated atomic layer deposited films: ZrO₂-Ta₂O₅, ZrO₂-Nb₂O₅-Ta₂O₅, ZrO₂-Ta_xNb_1−xO₅ and Ta₂O₅-Zr_xNb_yO_z. Even though the capacitances of laminates were often higher compared to films of constituent materials with similar thickness, considerably higher charge storage factors, Q, were achieved only when tetragonal ZrO₂ was stabilized in ZrO₂-Ta₂O₅ laminate and when the laminate thickness exceeded 50 nm. The decreased Q values in the case of most laminates were the result of increased leakage currents. In the case of thinner films only Ta₂O₅-Zr_xNb_yO_z stack possessed capacitance density and Q value higher than reference HfO₂. Concerning the conduction mechanisms, in the case of thinner films, the Ta₂O₅ or Ta_xNb_1−xO₅ apparently controlled the leakage either by Richardson-Schottky emission or Poole-Frenkel effect.     

Temperature and voltage dependences of the capture and emission times of individual traps in high-k dielectrics

Quantized threshold voltage (VTH) relaxation transients are observed in nano-scaled field effect transistors (FETs) after bias temperature stress. The abrupt steps are due to trapping/detrapping of individual defects in the gate oxide and indicate their characteristic emission/capture times. Individual traps are studied in n-channel SiO₂/HfSiO FETs after positive gate stress to complement previous studies performed on SiO(N). Similarly to single SiO(N) traps, strong thermal and bias dependences of the emission and capture times are demonstrated. The high-k traps have a higher density but a reduced impact on VTH due to their separation from the channel.     

Identification of electron trap location degrading low-frequency noise and PBTI in poly-Si/HfO2/interface-layer gate-stack MOSFETs

Identification of electron trap location in HfO₂/interface-layer (IFL) of poly-Si/TiN/HfO₂/SiO₂ gate-stacked MOSFETs is successfully demonstrated through analysis of low-frequency noise and PBTI characteristics with respect to nitrogen incorporation into the gate dielectrics in fabrication process. It is found that the electron trap existing in the bulk-IFL dominantly degrades low-frequency noise (LFN) and positive bias temperature instability (PBTI). The pre-existing electron trap is considered to be generated by N incorporation into the IFL in the fabrication process of gate-first process.     

Electrical and physical characteristics of HfLaON-gated metal-oxide-semiconductor capacitors with various nitrogen concentration profiles

The comparative studies of electrical and physical characteristics of HfLaON-gated metal-oxide-semiconductor (MOS) capacitors with various nitrogen concentration profiles (NCPs) were investigated. Various NCPs in HfLaON gate dielectrics were adjusted by Hf₂La₂O₇ target sputtered in an ambient of modulated nitrogen flow. The related degradation mechanisms of various NCPs in HfLaON dielectrics have been investigated under various post-deposition annealing (PDA). The results indicate that by developing full nitrogen profile (FNP) incorporated into HfLaON dielectric enhances electrical characteristics, including oxide trap charge, interface trap density, and trap energy level. Detailed understand of current mechanisms of various NCPs incorporated into HfLaON dielectrics using current-voltage characteristics under various temperature measurements were investigated. Energy band diagram of MOS capacitor with Ta/HfLaON/SiO₂/P-Si(1 0 0) structure was demonstrated by the measurement of Schottky barrier height and the optical band gaps.     

Reduction of Leakage Current by HfO 2 High K Dielectric Film Stacked on the Ferroelectric Layer of a MFIS Structure

We report here the reduction of leakage current through a thin ferroelectric layer by insertion of an HfO 2 film. We fabricated metal-insulator-ferroelectric-insulator-semiconductor (MIFIS) and metal-ferroelectric-insulator-metal (MFIS) structures. A Pb x La 1 m x TiO 3 (PLT) ferroelectric layer was deposited on a thermally oxidized p-type Si substrate with a Zr buffer layer. Adopting an HfO 2 layer on the ferroelectric layer of a MIFIS structure with an equivalent oxide thickness (EOT) of 5 nm resulted in a reduction by only 13 percent of the voltage distribution on the ferroelectric layer. Applying HfO 2 to the ferroelectric layer of a MFIS structure, however, led to a 70% decrease in leakage current: from 2.7 2 10 m 8 to 0.76 2 10 m 8 A/cm 2 at +1 V. An HfO 2 film, by itself, shows leakage that is 3 orders of magnitude smaller than that of PLT; clearly, insertion of the film impedes leakage through the ferroelectric layer. This characteristic is believed to contribute to extension of the retention time of MFMIS FETs.     

SiC MOSFETs with thermally oxidized Ta2Si stacked on SiO2 as high-k gate insulator

In this paper, we compare the electrical characteristics of MOS capacitors and lateral MOSFETs with oxidized Ta₂Si (O-Ta₂Si) as a high-k dielectric on silicon carbide or stacked on thermally grown SiO₂ on SiC. MOS capacitors are used to determine the dielectric and interfacial properties of these insulators. We demonstrate that stacked SiO₂/O-Ta₂Si is an attractive solution for passivation of innovative SiC devices. Ta₂Si deposition and oxidation is totally compatible with standard SiC MOSFET fabrication materials and processing. We demonstrate correct transistor operation for stacked O-Ta₂Si on thin thermally grown SiO₂ oxides. However the channel mobility of such high-k MOSFETs must be improved investigating the interface properties further.     

Microstructure and chemical analysis of Hf-based high-k dielectric layers in metal-insulator-metal capacitors

The microstructure and chemistry of the high-k gate dielectric significantly influences the performance of metal-insulator-metal (MIM) and metal-oxide-semiconductor devices. In particular, the local structure, chemistry, and inter-layer mixing are important phenomena to be understood. In the present study, high resolution and analytical transmission electron microscopy are combined to study the local structure, morphology, and chemistry in MIM capacitors containing a Hf-based high-k dielectric. The gate dielectric, bottom and gate electrodes were deposited on p-type Si(100) wafers by electron beam evaporation. Four chemically distinguishable sub-layers were identified within the dielectric stack. One is an unintentionally formed 4.0 nm thick interfacial layer of Ta₂O₅ at the interface between the Ta electrode and the dielectric. The other three layers are based on HfN_xO_y and HfTiO_y, and intermixing between the nearby sub-layers including deposited SiO₂. Hf-rich clusters were found in the HfN_xO_y layer adjacent to the Ta₂O₅ layer.     

Electrical properties and structure of laser-spike-annealed hafnium oxide

We studied the effects of laser-spike annealing (LSA) on hafnium oxide high-k dielectrics using high power diode laser. The equivalent oxide thickness of HfO₂ gate stacks annealed using a moderate laser power decreased noticeably as compared to as-grown films due to densification and crystallization of HfO₂. Transmission electron microscope and X-ray photoelectron spectroscopy show that regrowth of interfacial oxide and silication of HfO₂ layer are suppressed in case of LSA compared with rapid thermal annealing. Capacitance voltage hysteresis revealed stronger charge trapping/de-trapping behavior for LSA gate stacks as compared to rapid thermal annealed gate stack. However, bias-stress-induced flat band voltage shifts of LSA gate stacks were within acceptable levels, ? 30 mV, showing controllable threshold voltage.     

Valence number transition and silicate formation of cerium oxide films on Si(100)

Interface reactions of a Ce-oxide layer with Si(100) wafers have been characterized by X-ray photoelectron spectroscopy. The ratio of Ce atoms in Ce³⁺ states within the Ce-oxide layer has been found to decrease from 47% at as-deposited sample to 26% after annealing. From detailed reaction analysis of valence number transitions of Ce atoms and the creation of SiO₂ layer at the interface, the reacted Ce³⁺ atoms are converted into silicates and Ce⁴⁺ with a ratio of 2:1. The energy bandgap of Ce-silicate layer has been determined as 7.67 eV and the valence band offset with respect to Si(100) wafer has been extracted as 4.35 eV.