GaAs Mach－Zehnder型光波导开关／调制器

采用非对称Ｘ结耦合器代替传统的Ｙ分支器，研制了ＧａＡｓＭａｃｈ－Ｚｅｈｎｄｅｒ型２×２光开光，得到了小于－２２．４ｄＢ的串音比和１２Ｖ左右的开关电压，器件的波导传输损耗小于７ｄＢ／ｃｍ。预计该器件可广泛应用于ＧａＡｓ开关列阵及高速光调制等领域。     

Switching between tasks of unequal familiarity: The role of stimulus-attribute and response-set selection.

It has been reported that it is harder to switch to a strong, well-practiced task from a weaker, less-practiced task than vice versa. Three experiments replicated this surprising asymmetry and investigated how it is affected by a reduction in interference between tasks. Experiment 1 progressively delayed the onset of the stimulus attribute associated with the stronger task. Experiments 2 and 3 separated the response sets of the tasks. Both manipulations reduced, without eliminating, interference of the stronger with the weaker task but reversed the asymmetry of switch costs, resulting in a larger cost of switching to the weaker task. The results are interpreted in terms of a model of the interactions between control input, task strength, and task priming. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

PHS数据通信技术的发展及业务运营探讨

文章概述了个人手持电话系统(PHS)的发展过程,对其最新技术进行了介绍,并在对PHS数据通信业务的发展及运营策略进行深入分析和探讨的基础上,展望了该业务的应用前景.     

光突发交换中的冲突解决协议

文章介绍了适合于在当前技术条件下的新交换技术-光突发交换，并对光突发交换中的各种冲突解决协议进行了阐述和对比．     

在道岔缺口超标报警系统中的软件设计

介绍了SED1335的性能及特点，重点阐述了它在道岔缺口超标报警系统中显示字符、汉字、构建友好界面的软件设计方法，提出了编写液晶显示程序的一些优良算法。     

Survey of switching techniques in high-speed networks and their performance

One of the most promising approaches for high speed networks for integrated service applications is fast packet switching, or ATM (asynchronous transfer mode). ATM can be characterized by very high speed transmission links and simple, hard-wired protocols within a network. To match the transmission speed of the network links, and to minimize the overhead due to the processing of network protocols, the switching of cells is done in hardware switching fabrics in ATM networks. A number of designs have been proposed for implementing ATM switches. Although many differences exist among the proposals, the vast majority of them are based on self-routeing multistage interconnection networks. This is because of the desirable features of multi-stage interconnection networks such as self-routeing capability and suitability for VLSI implementation. Existing ATM switch architectures can be classified into two major classes: blocking switches, where blockings of cells may occur within a switch when more than one cell contends for the same internal link, and non-blocking switches, where no internal blocking occurs. A large number of techniques have also been proposed to improve the performance of blocking and non-blocking switches. In this paper, we present an extensive survey of the existing proposals for ATM switch architectures, focusing on their performance issues.     

A high-capacity broadband packet switch architecture based on a multilink approach

Broadband packet networks based on asynchronous transfer mode (ATM) are expected to provide a wide range of services, including motion video, voice, data and image. When these networks become prevalent, some applications such as motion video and high-speed LAN interconnections will place a very large bit rate requirement on the channels. Currently, the physical layer supported by the synchronous optical network (SONET) allows the transmission of up to 2.4 Gbit/s with the OC-48 optical interface. However, it is not feasible for the electronic packet switch to route packets at this rate on a single link. In this paper we present a design of a broadband packet switch that uses multiple links in parallel to realize a high-speed channel. This implementation permits the switch to operate at the lower link rate, which can be at 150 Mbit/s, while having the ability to support a virtual circuit at a higher rate (up to 2.4 Gbit/s). The main contribution of the design is that packet sequence on a channel is still maintained even though packets are allowed to use any of the links belonging to the same channel. Besides allowing the switch to function at a slower rate than the transmission channel rate, the implementation of the multilinks benefits from statistical multiplexing gain. Analytical results show the performance advantages of multilink design with respect to delay, throughput and packet loss probability.     

MOSFET亚阈特性分析与低温按比例缩小理论的研究

器件尺寸按比例缩小是实现超大规模集成电路的有效途径，但寄生和二级效应却将器件限在一定的水平，本文在对比分析常温与低温下小尺寸器件效应的基础上，重点研究了ＭＯＳ器件亚阈特性对器件性能及按比例缩小的影响，并根据低温工作的特点，提出了ＭＯＳ器件一种低温按比例缩小规则，该原则对低温器的优化设计，从而更大程度在提高电路与系统性能具有重要的指导意义。     

一种新的带优先权控制的ATM交换结构

本文在Ｋｎｏｃｋｏｕｔ交换结构的基础上，探讨一种新的ＡＴＭ交换结构，使其本身带有优先权控制功能，以适应不同业务对信元丢失率及时延的不同要求。这种结构既能最大限度地有效利用系统资源，又能满足不同用户对业务质量的不同要求，并能降低交换结构复杂度。     

Silicon power MOSFET at low temperatures: A two-dimensional computer simulation study

Understanding how the structure of the unit-cell affects the cryogenic performance of a Si power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is an important step toward optimizing of the device for cryogenic operations. In this paper, numerical simulations of the Si power Double Diffused MOSFET’ (DMOS) are performed at room temperature and cryogenic temperatures. Physically based models for temperature dependent silicon properties are employed in the simulations. The performances of power DMOS’ with various unit-cell structures are compared at both room temperature and low temperatures. The effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for room temperature operation can be further optimized at cryogenic temperatures.