0.4-V bulk-driven differential-difference amplifier

A new solution for an ultra-low-voltage, low-power, bulk-driven fully differential-difference amplifier (FDDA) is presented in the paper. Simulated performance of the overall FDDA for a 50 nm CMOS process and supply voltage of 0.4 V, shows dissipation power of 31.8 μW, the open loop voltage gain of 58.6 dB and the gain-bandwidth product (GBW) of 2.3 MHz for a 20 pF load capacitance. Despite the very low supply voltage, the FDDA exhibits rail-to-rail input/output swing. The circuit performance has also been tested in two applications; the differential voltage follower and the second-order band-pass filter, showing satisfactory accuracy and dynamic range.     

槽栅功率MOSFET单粒子微剂量效应电荷沉积模型

重离子会在槽栅功率MOSFET器件中引起电压电流特性漂移,即单粒子微剂量效应。为表征该效应,本文提出了一个电荷沉积模型。该模型可用来计算重离子轰击氧化层后引起的电荷沉积及电荷输运过程。应用本模型计算了单个Xe离子在二氧化硅/硅界面沉积的空穴正电荷。通过将该计算结果导入Sentaurus仿真软件中,模拟了单个Xe离子轰击槽栅MOSFET后引起的电压电流曲线漂移。模拟结果与相关实验结果一致。最后,应用本模型研究了不同参数对槽栅功率MOSFET单粒子微剂量效应的影响。     

超浅结亚45nm MOSFET 亚阈值区二维电势模型

文章提出将亚阈值区超浅结MOSFET的氧化层和Si衬底划分为三个区域,得到三个区域的定解问题,并用特征函数展开法求出了因边界衔接条件而产生的未知系数,首次得到超浅结亚45nm MOSFET的二维电势半解析模型,并给出了亚阈值电流模型。通过与Medici模拟结果对比发现该模型能够准确模拟亚阈值下的超浅结15～45nm MOSFET的二维电势和电流。     

An accurate two-dimensional CAD-oriented model of retrograde doped MOSFETs for improved short channel performance

An analytical CAD-oriented model for short channel threshold voltage of retrograde doped MOSFETs is developed. The model is extended to evaluate the drain induced barrier lowering parameter (R) and gradient of threshold voltage. The dependence of short channel threshold voltage and R on thickness of lightly doped layer (d) has also been analyzed in detail. It is shown that a retrograde doping profile reduces short channel effects to a considerable extent. A technique is developed to optimize the device parameters for minimizing short channel effects. The results so obtained are in close proximity with published data.     

线性余因子差分亚阈电压峰技术测量电应力诱生MOSFET界面陷阱的研究

本文提出了用线性余因子差分亚阈电压峰测量电应力诱生MOSFET界面陷阱的新技术并进行了实验验证 .详细介绍了该方法的基本原理和实验实现 ,得到了电应力诱生MOSFET界面陷阱和累积应力时间的关系 .该方法具有普适性 ,可用于MOSFET的一般可靠性研究和寿命预测 .     

功率MOS器件在不同温度条件下雪崩特性研究

本文使用实验和二维器件模拟仿真方法研究了高压功率MOS器件在不同温度条件下的耐雪崩能力。实验研究了国产功率MOS器件在最大额定工作温度范围(-55℃～150℃)发生的雪崩能量烧毁行为。采用包含电热非等温模型的ISE TCAD二维仿真软件模拟分析器件发生雪崩失效的机理。无嵌位电感实验数据及模拟结果证明,由于器件内部寄生效应及热效应影响,功率MOS器件雪崩耐量可靠性随着温度升高而退化,其主要原因与雪崩过程引起器件内部寄生双极管开启相关。     

Modeling of cylindrical surrounding gate MOSFETs including the fringing field effects

A physically based analytical model for surface potential and threshold voltage including the fringing gate capacitances in cylindrical surround gate(CSG) MOSFETs has been developed.Based on this a subthreshold drain current model has also been derived.This model first computes the charge induced in the drain/source region due to the fringing capacitances and considers an effective charge distribution in the cylindrically extended source/drain region for the development of a simple and compact model.The fringing gate capacitances taken into account are outer fringe capacitance,inner fringe capacitance,overlap capacitance,and sidewall capacitance.The model has been verified with the data extracted from 3D TCAD simulations of CSG MOSFETs and was found to be working satisfactorily.     

Experimental study of mobility degradation in ultrathin high-κ based MOSFETs

In order to examine the peak carrier mobility reduction in ultrathin high-κ based FETs, interface state density in HfSiON gated FETs (of EOT < 2 nm) was studied experimentally using two high resolution techniques. Both techniques independently established similar interface charge density values for the devices studied. By further studying the Coulomb limited mobility in the high-κ based FETs using a quantum mechanical approach, it is concluded that interface charge alone is insufficient to explain the peak mobility degradation observed, indicating that remote charge scattering, RCS, may be a significant mobility degradation factor in ultra thin HfSiON based FETs.     

Criticisms on and comparison of experimental channel backscattering extraction methods

In this paper we critically review and compare experimental methods, based on the Lundstrom model, to extract the channel backscattering ratio in nano MOSFETs. Basically two experimental methods are currently used, the most common of them is based on the measurement of the saturation drain current at different temperatures. We show that this method is affected by very poor assumptions and that the extracted backscattering ratio strongly underestimates its actual value posing particular attention to the backscattering actually extracted in nano devices. The second method is based on the direct measurement of the inversion charge by CV characteristics and gets closer to the physics of the backscattering model. We show, through measurements in high mobility p-germanium devices, how the temperature-based method gives the same result of the CV-based method once that its approximations are removed. Moreover we show that the CV-based method uses a number of approximations which are partially inconsistent with the model. In particular we show, with the aid of 2D quantum corrected device simulations, that the value of the barrier lowering obtained through the CV-based method is totally inconsistent with the barrier lowering used to correct the inversion charge and that the extracted saturation inversion charge is underestimated.     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.