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211.
This paper presents the design of fully differential current-mode integrating receivers for Gbytes/s parallel links. Both class A and class AB configurations are considered. The proposed receivers consist of a transimpedance front-end that provides a low and tunable matching impedance to the channels to accommodate current-mode signaling, an integrating stage that acts as a low-pass filter to suppress the transient disturbances coupled to the channels and receiver, and a regenerative sense amplifier to amplify the output voltage of the preceding integrator to full swing. The class AB configured sense amplifier provide a voltage gain that is twice that of class A sense amplifier, enabling a fast sensing and latching. The proposed receiver has been implemented in UMC , 1.2 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3v3 device models. Simulation results demonstrate that the proposed class current-mode integrating receivers provide full output voltage swing when the data rate is 2.5 Gbyte/s.  相似文献   
212.
概述了电感器的发展历程,重点介绍模压片式电感器、叠层片式电感器的结构特点,以及工艺条件对固有可靠性的影响,并对以上两种类型电感器主要失效模式及其失效机理进行了简要分析,针对电感器三种主要失效模式:电性能参数退化、开路、短路,设计了模压片式和叠层片式电感器的筛选方案,并取得一定效果.  相似文献   
213.
陈忆元  张斌 《微波学报》1996,12(4):288-295
本文借鉴低频电路中用电流传送器综合低频有源电感的思路提出一种设计微波有源电感的新方法.根据这种方法.获得了八种微波有源电感的电路结构.并且实际设计制作了一个小型化低损耗的芯片有源电感.这种方法非常适合于设计MMIC微波有源电感或有源滤波器.  相似文献   
214.
The optimum wire shape to produce the minimum signal propagation delay across an RLC line is shown to exhibit a general exponential form. The line inductance makes exponential tapering more attractive for RLC lines than for RC lines. For RLC lines, optimum wire tapering achieves a greater reduction in the signal propagation delay as compared to uniform wire sizing. For RLC lines, exponential tapering outperforms uniform repeater insertion. As technology advances, wire tapering becomes more effective than repeater insertion, since a greater reduction in the propagation delay is achieved. Optimum wire tapering achieves a reduction of 36% in the propagation delay in long RLC interconnect as compared to uniform repeater insertion.

Wire tapering can reduce both the propagation delay and power dissipation. Optimum tapering for minimum propagation delay reduces the propagation delay by 15% and power dissipation by 16% for an example circuit. The optimum tapering factor to minimize the transient power dissipation of a circuit is described in this paper. An analytic solution to determine the optimum tapering factor that exhibits an error of less than 2% is provided. Wire tapering is also shown to reduce the power dissipation of a circuit by up to 65%.

Wire tapering can also improve signal integrity by reducing the inductive noise of the interconnect lines. Wire tapering reduces the effect of impedance mismatch in digital circuits. The difference between the overshoots and undershoots in the signal waveform of an example clock distribution network is decreased by 34% as compared to a uniformly sized network producing the same signal characteristics.  相似文献   

215.
Three down-conversion mixers for low-voltage, balanced 900 MHz wireless applications are introduced. The mixers are implemented in a 0.8 m BiCMOS process and based on the four transistor BJT switching quad widely used in Gilbert cells. The mixers are designed to operate at a supply voltage of 1.5 V and without external components. The implemented mixers have a few decibels of conversion loss, a third-order input intercept point of a few dBm and a single sideband noise figure of about 15 dB. It is demonstrated that modest mixer operation performance is achieved with a DC power consumption of only 1 mW. Also planar inductors on silicon and bond-wire inductors are shown to be valuable to achieve a return loss of about 9 dB for input and output ports of a mixer. The measurement results for the mixers as well as the lumped element models for the used planar inductor and for the bondwire are presented.  相似文献   
216.
曹圣国  韩科锋  谈熙  闫娜  闵昊 《半导体学报》2011,32(2):025010-4
本文实现了一种集成高品质因素片上电感的差分互补压控振荡器。该压控振荡器的谐振腔由片上电感和反型MOS电容并联组成。谐振腔的品质因素主要被片上电感性能所限制。通过优化设计以及采用单圈的拓扑结构,片上电感在6GHz仿真的品质因素可以达到35。本文提出的压控振荡器采用SMIC0.13微米工艺流片,芯片面积为1.0×0.8mm2。振荡器的频率范围为5.73GHz到6.35GHz。当振荡器中心频率为6.35GHz时,其功耗在1.0V电源电压时为2.55mA,1MHz频偏处相位噪声为-120.14dBc/Hz。该压控振荡器的FOM值达到-192.13dBc/Hz.  相似文献   
217.
本文根据电网络的基本性质,并结合单位样值函数的抽样作用,导出并实现了一种新的时变网络计算机辅助分析方法。该方法直接以节点电压和支路电流为解变量,对包含时变电阻、时变电感、时变电容、时变互感与四种时变受控源的一般电网络都可进行机助分析。  相似文献   
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