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排序方式: 共有217条查询结果,搜索用时 156 毫秒
41.
T. Ostermann 《Microelectronics Journal》2004,35(6):525-530
Ground bounce as a result of fast switching currents is on of the main source for the electromagnetic emission of an integrated circuit. One common method to reduce the ground bounce amplitude is the use of on-chip decoupling capacitors. Besides of this measure other concepts, like the use of different power supply pins, are supposed to reduce ground bounce too. But for all of these measures detail knowledge for the optimal use does not exists so far. In this paper we present a test chip as well as a measurement method for investigations on these measures towards future design guidelines. 相似文献
42.
电动汽车电池充电不方便以及充电效果的不理想是制约电动汽车发展的重要原因.提出了一种新型纯电动汽车车载充电器的设计方案,采用直流电机绕组线圈作为升压电路的储能电感,逆变桥电路作为开关电源的功率开关管,实现对电流和电压的调节,通过整车控制器中的充电控制程序实现对该充电过程的控制.该方案充分利用电动汽车的现有资源,只需在原有电动汽车控制器中加入少量元件即可实现整个充电过程,简化了充电的结构.针对这一方案,进行了系统可行性分析和系统硬件的设计,最终通过实验进行了验证. 相似文献
43.
Fully‐Inkjet‐Printed Ag‐Coil/NiZn‐Ferrite for Flexible Wireless Power Transfer Module: Rigid Sintered Ceramic Body into Flexible Form
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Murali Bissannagari Woosung Lee Woong Yong Lee Jun Hwan Jeong Jihoon Kim 《Advanced functional materials》2017,27(31)
Despite the material performances being superior to those of organic materials, inorganic materials are typically excluded for use in flexible and deformable electronic systems because of their rigid nature and the requirement for high processing temperature. This work presents a novel method of utilizing rigid NiZn‐ferrite films in a flexible platform and offers an opportunity to realize a flexible wireless power transfer (WPT) module. Inkjet printing is introduced in this study since it can coat NiZn‐ferrite films as well as pattern inductor coils for WPTs. A thermochemically inert buffer layer is selected based on a thermodynamic analysis and is introduced as a buffer layer for the NiZn‐ferrite to prevent chemical reaction between the ferrite film and the substrate and ensure that the ferrite film can be easily separated from the substrate during a high‐temperature sintering process. A Ag‐inductor coil is printed on the NiZn‐ferrite layer, and then the entire layer is embedded into polydimethylsiloxane, which renders the WPT module flexible. The flexibility of the WPT module is characterized by a bending test, and the structural and magnetic properties are also investigated. The performance of the flexible WPT module is demonstrated by transmitting wireless power to a light emitting diode. 相似文献
44.
A small signal coupling model is developed to analyze the coupling between two LNAs. The mutual inductance between the adjacent on-chip inductors is considered responsible for this coupling. A set of formulas have been derived to quantitatively predict the coupling effects. Based on our analysis, a quick estimation can be made to see which pair of inductors plays a key role in evaluating the coupling between the LNAs. Source inductors of two LNAs are placed closely while the load inductors are far apart according to the analysis. To validate the proposed theory, two 2 GHz LNAs are fabricated. The LNAs have a peak gain of 18 dB and NF of 1.4 dB. The coupling between the LNAs is -30 dB. 相似文献
45.
Asit K. MishraAuthor Vitae Aditya YanamandraAuthor Vitae 《Journal of Parallel and Distributed Computing》2011,71(5):625-640
With increasing number of cores being integrated on a single die, Network-on-Chips (NoCs) have become the de-facto standard in providing scalable communication backbones for these multi-core chips. NoCs have a significant impact on the system’s performance, power and reliability. However, NoCs can be plagued by higher power consumption and degraded throughput if the network and router are not designed properly. Towards this end, this paper proposes a novel router architecture, where we tune the frequency of a router in response to network load to manage both performance and power. We propose three dynamic frequency tuning techniques, FreqBoost, FreqThrtl and FreqTune, targeted at congestion and power management in NoCs. We also propose and evaluate a novel fine-grained frequency tuning scheme where we vary the number of virtual-channels in a router dynamically. As a further optimization to these schemes, we propose a frequency tuning scheme where we tune the frequency of the four ports of a mesh router separately from the local port. As enablers for these techniques, we exploit Dynamic Voltage and Frequency Scaling (DVFS) and the imbalance in a generic router pipeline through time stealing. We also evaluate and analyze the proposed schemes from the point of view of reliability against soft error vulnerability and provide guidelines in choosing the appropriate scheme when reliability is the prime design constraint.Experiments using synthetic workloads on an 8 × 8 wormhole-switched mesh interconnect show that FreqBoost is a better choice for reducing average latency (maximum 40%) while, FreqThrtl provides the maximum benefits in terms of power saving and energy delay product (EDP). The FreqTune scheme is a better candidate for optimizing both performance and power, achieving on an average 36% reduction in latency, 13% savings in power (up to 24% at high load), and 40% savings (up to 70% at high load) in EDP. With application benchmarks, we observe IPC improvement up to 23% using our design. Our analysis shows FreqBoost to be the most robust scheme amongst the three schemes when reliability is a concern. 相似文献
46.
Marian Pierzcha?a 《Microelectronics Journal》2011,42(8):999-1005
This paper proposes a novel method of synthesis of active RC-filters. The process is based on the use of the classical LC-network. The constructed equivalent active circuit uses a kind of active switches, i.e. nullators and norators that ensure ‘switching’ between voltage graphs and current graphs. Accordingly, parameters of the constructed circuit depend only on the values of resistors and capacitors and not on the parameters of the active elements. The proposed approach is illustrated through two examples. SPICE simulation results are given to show viability of the proposed method. 相似文献
47.
Yan Yang Huaiwu Zhang Jie Li Fang Xu Gongwen Gan Dandan Wen 《Ceramics International》2018,44(9):10545-10550
NiCuZn ferrite with superior magnetic performance is vital ceramic material in multilayer chip inductors (MLCI) applications. In this study, low-temperature-sintered Ni0.22Cu0.2Zn0.58Fe2O4 ferrite ceramic doped with 1.0?wt% Bi2O3-x?wt% Nb2O5 (where x?=?0.0, 0.1, 0.2, 0.3, 0.4 and 0.5) was synthesized via solid-state reaction method. Effects of Bi2O3-Nb2O5 additives on microstructures and magnetic properties of NiCuZn ferrite ceramics sintered at 900?°C were systematically investigated. Results indicate that an appropriate amount of Bi2O3-Nb2O5 composite additives can significantly promote grain growth and densification of NiCuZn ferrite ceramics when sintered at low temperatures. Specifically, samples doped with 1.0?wt% Bi2O3 and 0.4?wt% Nb2O5 additives exhibited excellent initial permeability (~ 410 @ 1?MHz), high cutoff frequency (~ 10?MHz), high saturation magnetization (~ 54.92?emu/g), and low coercive force (~ 20.32?Oe). These observations indicate that NiCuZn ferrite ceramics doped with appropriate amounts of Bi2O3-Nb2O5 additives are great candidate materials for MLCI applications. 相似文献
48.
The study of monolithic integration of active inductors (AI) on a 0.25 μm SiGe BiCMOS technology with 4 metal layers and HBTs with fT=120 GHz is presented. Two topologies are presented and their performance discussed. Q values higher than 30 were obtained on a 3.4 GHz bandwidth at 28 GHz and maximum values as high as 100. Active inductors can be biased with low power, such as 2 V with a nominal DC current of 0.6 mA. The inductance value is controlled by external bias voltages and adjustments up to 40% were measured. Simple gyrators topologies with only 2 transistors are used for low power consumption and good performance at K Band is proved. The internal parameters of small signal model of HBT were studied and the crucial parameter to enhance the negative resistance and so the Q of the AI was identified. 相似文献
49.
AMBA 2.0总线IP核的设计与实现 总被引:2,自引:2,他引:0
文章采用Top—Down的方法设计了AMBA2.0总线IP核,它包括AHB和APB两个子IP核。所有AMBA结构模块均实现了RTL级建模,对其中较复杂的仲裁器和AHB/APB桥模块给出了详细的描述。该IP完成了FPGA的验证,最高频率为53.6MHz。在ASIC0.18μm标准单元库下对该IP进行综合与优化,最高频率可以达到150MHz。 相似文献
50.