Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. A major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diverse manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. The Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.     

A parallel algorithm with enhancements via partial objective value cuts for cluster-based wireless sensor network design

In this paper, we develop a parallel algorithm for the solution of an integrated topology control and routing problem in Wireless Sensor Networks (WSNs). After presenting a mixed-integer linear optimization formulation for the problem, for its solution, we develop an effective parallel algorithm in a Master–Worker model that incorporates three parallelization strategies, namely low-level parallelism, domain decomposition, and multiple search (both cooperative and independent) in a single Master–Worker framework.     

Modeling and solving mixed-model assembly line balancing problem with setups. Part I: A mixed integer linear programming model

This paper is the first one of the two papers entitled “modeling and solving mixed-model assembly line balancing problem with setups”, which has the aim of developing the mathematical programming formulation of the problem and solving it with a hybrid meta-heuristic approach. In this current part, a mixed-integer linear mathematical programming (MILP) model for mixed-model assembly line balancing problem with setups is developed. The proposed MILP model considers some particular features of the real world problems such as parallel workstations, zoning constraints, and sequence dependent setup times between tasks, which is an actual framework in assembly line balancing problems. The main endeavor of Part-I is to formulate the sequence dependent setup times between tasks in type-I mixed-model assembly line balancing problem. The proposed model considers the setups between the tasks of the same model and the setups because of the model switches in any workstation. The capability of our MILP is tested through a set of computational experiments. Part-II tackles the problem with a multiple colony hybrid bees algorithm. A set of computational experiments is also carried out for the proposed approach in Part-II.     

时间Petri网与CAGA算法相结合的并行测试研究

在并行测试的研究中对于任务的测试次序一直是个研究重点及难题。用时间Petri网建立关于并行测试系统的模型,并首次用元胞遗传算法(CAGA)对模型中的变迁序列进行搜索,快速得到最好的测试序列。通过仿真结果表明,该算法展示了很好的收敛效果,并且与已有的研究成果相比更具优势。     

基于MPI高性能计算的方法研究

并行处理在计算能力方面与单处理器的串行处理相比有着无可比拟的优势。个人计算机和网络成本的下降使得使用分布式系统进行并行处理的现象越来越普遍,而分布式网络系统中多采用MPI作为并行编程标准。为了减少程序运行时间,改善MPI计算的性能,负载均衡方法尤为重要,本文提出一种在MPI并行处理中负载均衡的方法,可以按照节点的计算能力和负载情况,在节点之间分配和迁移任务。实验表明,本文提出的方法可有效提高MPI并行处理的性能。     

Fast fingerprint identification for large databases

Fingerprint matching has emerged as an effective tool for human recognition due to the uniqueness, universality and invariability of fingerprints. Many different approaches have been proposed in the literature to determine faithfully if two fingerprint images belong to the same person. Among them, minutiae-based matchers highlight as the most relevant techniques because of their discriminative capabilities, providing precise results. However, performing a fingerprint identification over a large database can be an inefficient task due to the lack of scalability and high computing times of fingerprint matching algorithms.In this paper, we propose a distributed framework for fingerprint matching to tackle large databases in a reasonable time. It provides a general scheme for any kind of matcher, so that its precision is preserved and its time of response can be reduced.To test the proposed system, we conduct an extensive study that involves both synthetic and captured fingerprint databases, which have different characteristics, analyzing the performance of three well-known minutiae-based matchers within the designed framework. With the available hardware resources, our distributed model is able to address up to 400 000 fingerprints in approximately half a second. Additional details are provided at http://sci2s.ugr.es/ParallelMatching.     

基于CUDA的并行粒子群优化算法研究及实现

应用图形处理器(GPU)来加速粒子群优化(PSO)算法并行计算时,为突出其加速性能,经常有文献以恶化CPU端PSO算法性能为代价。为了科学比较GPU-PSO算法和CPU-PSO算法的性能,提出用"有效加速比"作为算法的性能指标。文中给出的评价方法不需要CPU和GPU端粒子数相同,将GPU并行算法与最优CPU串行算法的性能作比较,以加速收敛到目标精度为准则,在统一计算设备架构(CUDA)下对多个基准测试函数进行了数值仿真实验。结果表明,在GPU上大幅增加粒子数能够加速PSO算法收敛到目标精度,与CPU-PSO相比,获得了10倍以上的"有效加速比"。     

评“异向双螺杆挤出机的发展前景”一文

本文结合Ｊ．Ｌｅｉｎｇａｒｔｎｅｒ先生的文章，从一个新的角度分析了锥形双螺杆和平行双螺杆挤出机各自的特点，对两种双螺杆挤出机作了评价。     

基于并行预测控制的Turbo码译码结构

提出一种基于并行预测控制的Turbo码译码结构. 通过建立预测控制模块(PCA)来预测分量译码器第n+1次的译码外部信息值. 相比于传统的并行译码方案,基于PCA模块的PPC-Turbo结构可以降低译码算法的复杂度,并减少译码时延. 通过对单次外部信息值预测（6～9次）及复次外部信息值预测（6+8、7+9次）,对比了外部信息预测的变化趋势及不同帧长（1?024、512、256、128、64帧）情况下的译码时延,验证了译码时延的减少. 在帧长为1?024、信噪比为0～2?dB时,对译码器2第6～8次的外部信息进行了单次预测,比较了PPC-Turbo与Turbo的误比特率(BER)性能,结果表明,两者的BER非常接近,预测控制模块可以代替分量译码器的一次译码迭代.     

异向旋转双螺杆挤出机的发展前景

本文通过分析螺杆在不同区段的几何特征及其对相应加工阶段的影响对平行和锥形双螺杆挤出机进行了全面的比较。