MOS结构深能级瞬态谱的测试与分析

叙述了一种采用MOS结构研究半导体深能级陷阱的深能级瞬态谱(DLTS)测试与分析方法。该方法简便易行,适用范围广。通过对n-Al_(0.2)Ga_(0.8)As中深能级的研究表明,MOS结构和p~+-n结构的DLTS结果相同。     

Ni(pz)_4Br_2型络合物的光、热、磁性质的理论研究

本文利用d8（D*（4h））对称性与d8（D*（2h））对称性线性叠加d8［（1－C2）D*（4h）＋C2D*（2h）］作为Ni2+离子的环境品场，借助于强场能量矩阵和全组态混合EPR理论对Ni（pz）_4Br_2型络合物的吸收光谱、肖特基（Schottky）热容量和顺碰碰化车进行了统一计算和理论分析．理论结果与实验观测值符合甚好．从而对Ni（pz）_4Br_2的光、热、磁性质作出了完整、合理的理论解释．     

InxGa1−xAs ohmic contacts to n-type GaAs with a tungsten nitride barrier

Significant reduction of the contact resistance of In_0.7Ga_0.3As/Ni/W contacts (which were previously developed by sputtering in our laboratory) was achieved by depositing a W₂N barrier layer between the Ni layer and W layer. The In_0.7Ga_0.3 As/Ni/W₂N/W contact prepared by the radio-frequency sputtering technique showed the lowest contact resistance of 0.2 Ωmm after annealing at 550°C for 10 s. This contact also provided a smooth surface, good reproducibility, and excellent thermal stability at 400°C. The polycrystalline W₂N layer was found to suppress the In diffusion to the contact surface, leading to improvement of the surface morphology and an increase in the total area of the In_xGa−As between metal and the GaAs substrate. These improvements are believed to reduce the contact resistance.     

Defect state assisted tunneling in intermediate temperature molecular beam epitaxy grown GaAs

Current transport in molecular beam epitaxy (MBE) GaAs grown at low and intermediate growth temperatures is strongly affected by defects. A model is developed here that shows that tunneling assisted by defect states can dominate, at some bias ranges, current transport in Schottky contacts to unannealed GaAs material grown at the intermediate temperature range of about 400°C. The deep defect states are modeled by quantum wells which trap electrons emitted from the cathode before re-emission to semiconductor. Comparison of theory with experimental data shows defect states of energies about 0.5 eVbelow conduction band to provide the best fit to data. This suggests that arsenic interstitials are likely to mediate this conduction. Comparison is also made between as-grown material and GaAs grown at the same temperature but annealed at 600°C. It is suggested that reduction of these defects by thermal annealing can explain lower current conduction at high biases in the annealed device as well as higher current conduction at low biases due to higher lifetime. Quenching of current by light in the as-grown material can also be explained based on occupancy of trap states. Identification of this mechanism can lead to its utilization in making ohmic contacts, or its elimination by growing tunneling barrier layers.     

Effects of PCBM concentration on the electrical properties of the Au/P3HT:PCBM/n-Si (MPS) Schottky barrier diodes

In this study, the gold/poly(3-hexylthiophene):[6,6]-phenyl C61 butyric acid methyl ester/n-type silicon (Au/P3HT:PCBM/n-Si) metal–polymer–semiconductor (MPS) Schottky barrier diodes (SBDs) were investigated in terms of the effects of PCBM concentration on the electrical parameters. The forward and reverse bias current–voltage (I–V) characteristics of the Au/P3HT:PCBM/n-Si MPS SBDs fabricated by using the different P3HT:PCBM mass ratios were studied in the dark, at room temperature. The main electrical parameters, such as ideality factor (n), barrier height (Φ_B0), series resistance (R_s), shunt resistance (R_sh), and density of interface states (N_ss) were determined from I–V characteristics for the different P3HT:PCBM mass ratios (2:1, 6:1 and 10:1) used diodes. The values of n, R_s, Φ_B0, and N_ss were reduced, while the carrier mobility and current were increased, by increasing the PCBM concentration in the P3HT:PCBM organic blend layer. The ideal values of electrical parameters were obtained for 2:1 P3HT:PCBM mass ratio used diode. This shows that the electrical properties of MPS diodes strongly depend on the PCBM concentration of the P3HT:PCBM organic layer. Moreover, increasing the PCBM concentration in P3HT:PCBM organic blend layer improves the quality of the Au/P3HT:PCBM/n-Si (MPS) SBDs which enables the fabrication of high-quality electronic and optoelectronic devices.     

半导体器件欧姆接触中的扩散阻挡层

为提高半导体器件欧姆接触的可靠性，一般要在金属化系统中加扩散阻挡层。本文介绍了扩散阻挡层的种类及其特性，并进行了比较和讨论。最后给出了在实际成功应用的例子。     

具有势垒增强层的MSM光电探测器暗电流的计算

将具有完全晶格匹配势垒增强层的MSM－PD简化为一维模型，并通过理论分析，得出了它的暗电流特性，进一步得到器件暗电流与势垒增强层的关系。     

Electrical characteristics of high performance Au/n-GaN schottky diodes

Au/n-GaN Schottky diodes with the Au electrode deposited at low temperature (LT=77K) have been studied. In comparison, the same chip of GaN epitaxial layer was also used for room temperature Schottky diodes. The low temperature Schottky diodes exhibit excellent performance. Leakage current density as low as 2.55×10⁻¹¹ A·cm⁻² at −2.5 V was obtained in the LT Schottky diodes. The linear region in the current-voltage curve at forward bias extends more than eight orders in current magnitude. Current-voltage-temperature measurements were carried out to study the characteristics of the LT Schottky diodes. A typical barrier height of about 1.32 eV for the LT diode, which is the highest value ever reported, was obtained. The obvious enhancement in electrical performance makes the LT processing a very promising technique for GaN device application although the detailed mechanisms for the LT Au/n-GaN Schottky diodes are still under investigation.     

Effect of reactive ion etch-induced damage on the performance of 4H-SiC schottky barrier diodes

The effect of reactive ion etch (RIE) induced damage on 4H-SiC surfaces etched in fluorinated plamas has been investigated and characterized using Ni Schottky diodes and x-ray photoelectron spectroscopic surface analysis. The diodes were characterized using current-voltage, current-voltage-temperature, and capacitance-voltage measurements with near ideal forward characteristics (n=1.07) and forward current density as high as 9000 A/cm² from the control (unetched) devices. High current handling capability was observed in diodes with etched surfaces as well. Diodes with surfaces etched in CHF₃ containing plasmas showed a significant reduction in the barrier height compared to the diodes with surfaces etched in CF₄ containing plasma. Control devices exhibited high leakages when reverse biased, which is attributed to the presence of a thin (∼2 nm) oxide layer at the metal-semiconductor interface. However, under reverse bias diodes with CHF₃-etched surfaces showed improvement in leakage current compared to diodes with CF₄-etched surfaces and the control diodes.     

电子在一维方势垒顶部的透射

文中对入射电子能量等于一维方势垒高度时，电子对势垒的透射情况进行了理论分析，导出了这一条件下的电子透射系数与势垒高度及势垒宽度之间的关系，并证明了电子对一维方势垒的透射系数Ｔ是入射电子能量Ｅ的连续函数。