基于MPC860启动引导程序研究与设计

启动引导程序是嵌入式程序的开头部分,它负责ES860的硬件初始化,载入操作系统内核,向内核传递参数信息,并将控制转交给内核,然后由内核软件再初始化操作系统,从而实现整个系统的启动;文中通过对Linux引导程序工作原理和机制的分析,介绍了在嵌入式Linux系统下基于MPC860的启动引导程序的设计方法,分析了CPU、存储器、ES860的初始化过程,结合对引导程序Uboot的源代码讨论,提出了一个在ES860开发平台上实现的引导程序,对引导过程的第一阶段和第二阶段以及相应的源程序都作了详细的分析,对源程序的调试和固化过程也作了简要讨论.     

基于深度强化学习的动态装配算法

针对动态装配环境中存在的复杂、动态的噪声扰动,提出一种基于深度强化学习的动态装配算法。将一段时间内的接触力作为状态,通过长短时记忆网络进行运动特征提取;定义序列贴现因子,对之前时刻的分奖励进行加权得到当前时刻的奖励值;模型输出的动作为笛卡尔空间位移,使用逆运动学调整机器人到达期望位置。与此同时,提出一种对带有资格迹的时序差分算法改进的神经网络参数更新方法,可缩短模型训练时间。在实验部分,首先在圆孔–轴的简单环境中进行预训练,随后在真实场景下继续训练。实验证明提出的方法可以很好地适应动态装配任务中柔性、动态的装配环境。     

基于能耗热点的SPM静态分配策略

提出一种基于能耗热点的片上存储器静态分配策略.该分配策略依据带权重扩展控制流图将应用程序划分成不同的逻辑节点,并通过SPM平均访问能耗值计算出逻辑节点被放入SPM后产生的访问能耗的大小,以及各节点的能耗密度.构造SPM空间分配的整数线性规划算法(ILP),转化成以能耗密度为优先权的0-1背包算法来选择要放入SPM的节点.实验结果表明,使用该分配策略来管理SPM空间分配,比不使用SPM时的能耗量平均减少34%左右.     

XML数据查询的并行算法

目前已经提出了多种查询XML数据的方法,然而这些传统的方法不能充分利用多处理器和多核心处理器的优势。本文提出了一种XML查询的并行算法,大幅提高了共享存储器多处理器、多核心处理器系统中XML数据的查询效率。     

BYS91─1多机系统存储器频带的分析

ＢＹＳ９１－１是基于ＲＩＳＣｉ８６０ＸＰ设计的具有局部存储和共享存储的多机系统。本文以排队论为工具，建立了该系统存储器的排队模型，给出了存储器使用频带的解析式，并结合具体的设计参数，分析了系统中处理机个数、存储空间配置对存储器有效频带的影响。     

Memory E?cient Two-Pass 3D FFT Algorithm for Intelr Xeon PhiTM Coprocessor

Equipped with 512-bit wide SIMD instructions and large numbers of computing cores, the emerging x86-based Intelr Many Integrated Core (MIC) Architecture provides not only high floating-point performanc...     

基于内存池的空间数据调度算法

计算机处理海量空间数据时,内外存之间数据的频繁交互导致内存占用高、处理效率低。使用内存池方式调度空间数据可以提高计算机效率。在多种特定地图使用模式下,不同的内存池页面置换算法能有效降低操作过程中的内外存交互,提高空间数据调度效率。实验表明,该算法为内存容量有限的嵌入式设备上的GIS提出了高效处理空间数据的方案。     

Optimised memory allocation for less false abortion and better performance in hardware transactional memory

ABSTRACT

This paper introduces and tackles a special performance hazard in Hardware Transactional Memory (HTM): false abortion. False abortion causes many unnecessary transaction abortions in HTM and can greatly impact the performance, making HTM not that useful when it is adopted as a fast path for Software Transactional Memory. By introducing a new memory allocator design, we are able to put objects that are likely to be accessed together from different threads into different cache lines and thus avoid conflicts of hardware transactions in different threads. Experiments show that our method can reduce 47% of transaction abortion and achieve a speedup of up to 1.67× (averagely 22%), yet only consume 14% more memory, showing great potential to enhance current HTM technology.     

高速数据采集卡WDM驱动程序的开发

WDM是Microsoft Windows 2000/XP操作系统的标准驱动程序模型。文中在简要介绍一款基于PCI总线高速数据采集卡硬件设计的基础上,详细阐述了基于WDM模型的驱动程序设计。并结合项目的实际情况,对设计中一些策略的考虑和编程技巧做了讨论,给出了利用DDK开发WDM驱动程序的实例。     

Store Atomicity for Transactional Memory

We extend the notion of Store Atomicity [Arvind and Jan-Willem Maessen. Memory model = instruction reordering + store atomicity. In ISCA '06: Proceedings of the 33rd annual International Symposium on Computer Architecture, 2006] to a system with atomic transactional memory. This gives a fine-grained graph-based framework for defining and reasoning about transactional memory consistency. The memory model is defined in terms of thread-local Instruction Reordering axioms and Store Atomicity, which describes inter-thread communication via memory. A memory model with Store Atomicity is serializable: there is a unique global interleaving of all operations which respects the reordering rules and serializes all the operations in a transaction together. We extend Store Atomicity to capture this ordering requirement by requiring dependencies which cross a transaction boundary to point in to the initiating instruction or out from the committing instruction. We sketch a weaker definition of transactional serialization which accounts for the ability to interleave transactional operations which touch disjoint memory. We give a procedure for enumerating the behaviors of a transactional program—noting that a safe enumeration procedure permits only one transaction to read from memory at a time. We show that more realistic models of transactional execution require speculative execution. We define the conditions under which speculation must be rolled back, and give criteria to identify which instructions must be rolled back in these cases.