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91.
92.
随着变频调速技术的蓬勃发展,变频器供电电机的温升问题已引起人们的广泛关注。本文首先讨论了电动机的温升限度;然后结合感应电机温升实验的相关数据分析了变频器供电对电动机温升的影响及其原因;最后从降低发热量和提高散热能力两方面提出缓解电机温升的措施,并指出了实际应用中应注意的问题。 相似文献
93.
Coplanar waveguide (CPW) and thin film microstrip (TFMS) lines integrating porous ultra low-k as inter-metal dielectric layers (k = 2.5) and copper as metal, are for the first time experimentally measured up to 110 GHz and under different temperature conditions, up to 200 °C. The extracted attenuation and propagation coefficients of those transmission lines are compared to simulations performed with MAGWEL software, a frequency domain 3-D Maxwell solver. Based on the characterization results some guidelines related to interconnect design are presented for future applications. 相似文献
94.
Circuits optimized for minimum energy consumption operate typically in the subthreshold regime with ultra-low power-supply voltages. Speed of a subthreshold logic circuit is enhanced with an increase in the die temperature. The excessive timing slack observed in the clock period of subthreshold logic circuits at elevated temperatures provides opportunities to lower the active-mode energy consumption. A temperature-adaptive dynamic-supply voltage-tuning technique is proposed in this paper to reduce the high-temperature energy consumption without degrading the clock frequency in ultra-low-voltage subthreshold logic circuits. Results indicate that the energy consumption can be lowered by up to 40% by dynamically scaling the supply voltage at elevated temperatures. An alternative technique based on temperature-adaptive reverse body bias to exponentially reduce the subthreshold leakage currents at elevated temperatures is also investigated. The active-mode energy consumption with two temperature-adaptive voltage-tuning techniques is compared. The impact of the process parameter and supply voltage variations on the proposed temperature-adaptive voltage scaling techniques is evaluated. 相似文献
95.
通过对回流焊接工艺参数传输带速度、各个炉区温度设定和焊膏熔化温度曲线的关系研究,建立了大尺寸PCB组件传热过程的数学模型。基于ANSYS平台,模拟了无铅焊料PCB组件在十温区回流焊接过程中的温度场,从而确定了合适的焊接参数。 相似文献
96.
97.
《Microelectronics Journal》2014,45(11):1515-1521
In this work, we discuss the origin and temperature dependence of various mechanisms behind the flow of leakage current in two topologies of TFET – basic TFET and pocket doped TFET. It is shown that the leakage current of pocket doped TFET shows relatively less variations with change in temperature when compared with MOSFET and basic TFET, and hence they can be deployed in low voltage temperature variation prone applications. But, this advantage of pocket-doped TFET is overshadowed by the huge sensitivity of its ON-state current towards variations in doping concentration at the tunnel junction. Hence, the fabrication of the TFET based circuits requires a negotiation with the yield and cost of the fabrication process. In order to mitigate this issue, we propose a hybrid TFET-CMOS based power gating technique. The hybrid technique utilizes a minimum number of TFETs to reduce the sleep mode leakage current, while enabling a temperature variation tolerant sleep mode at a supply voltage of 0.6 V. 相似文献
98.
A. Fontserè A. Pérez-TomásM. Placidi P. Fernández-MartínezN. Baron S. ChenotY. Cordier J.C. MorenoP.M. Gammon M.R. Jennings 《Microelectronic Engineering》2011,88(10):3140-3144
In this paper two types of Al/Ti-based Ohmic contacts to Gallium Nitride (GaN) based devices are presented; ImplantedN+GaN (like the ones found in the Source/Drain of GaN Metal Oxide Semiconductor Field Effect Transistors-MOSFET) and heterojunction (HJ) AlGaN/GaN contacts (Source/Drain of High Electron Mobility Transistors-HEMT). Sheet resistance (Rsh) and contact resistance (Rc) have been investigated in the temperature (T) range of 25-250 °C. It was found that the Rsh (850/700 Ω□) (25/250 °C) and Rc (2.2/0.7 Ωmm) decrease with T for ImplantedN+GaN contact and Rsh (400/850 Ω□) and Rc (0.2/0.4 Ωmm) (weakly for Rc) increase with T for HJAlGaN/GaN contact. Numerical computation based models are used to determine the theoretical Rsh and Rc behavior with T and to fit the experimental values. 相似文献
99.
100.
We present a detailed and accurate physics based transient simulation for modeling flash memory erasing at ambient and non-ambient temperatures. Typical cells are erased by moving electrons from the floating gate to the drain, source or substrate. Part I of this paper addresses substrate erase modeling using a simulation based on the solution to Poisson’s equation with temperature as an independent variable. The goal of this paper is to demonstrate the derivation of an accurate erase simulation and show the effects of temperature on the threshold voltage shift during the erase process. Several papers have been published on this topic but fail to present detailed derivations and none using this exact set of equations to model the temperature dependent erasing process. 相似文献