Probabilistic Bit Stream Neural Chip: Theory

A design for a neural network chip is proposed using probabilistic bit streams to represent real values. This paper analyzes the performance of the proposed neurons in this design and demonstrates that very simple operations can be used to obtain the desired functionality. It is also shown that a suitable ‘activation function’ for neurons of this type can be obtained using the interaction of two probability distributions. Finally, the paper introduces a variant of the back-propagation learning algorithm which involves computing the derivatives of the output with respect to individual weights in a network of such units.     

射频宽带功率放大器设计

针对软件无线电台的特点与要求,研制了一款射频宽带功率放大器。首先,判别功率管的稳定性,基于S参数的设计方法,对功放的输入输出匹配电路进行设计和仿真优化。最终使该款功率放大器测试结果达到设计要求。     

量子小波变换算法及线路实现

随着小波理论研究的深入,以及小波分析在信号分析和图像处理等领域的广泛应用,小波分析在量子计算领域中也越来越受到重视.应用置换矩阵、W-H变换矩阵和量子傅立叶变换矩阵来对Haar小波及D(4)小波变换矩阵进行分解,给出其算法,然后得出其完整的量子逻辑线路图,最后分析其复杂度.     

基于多小波变换的模拟电路IDDT故障诊断

动态电源电流测试（IDDT）对模拟电路故障诊断非常有效。针对小波神经网络在模拟电路IDDT故障诊断中存在的缺陷,提吐了一种基于多小波变换的模拟电路IDDT故障诊断方法。即利用多小波变换提取电源电流各频段的能量,作为神经网络的输入特盘向量进行故障诊断。仿真结果表明,该方法是有效的,而且比小波神经网络方法的收敛速率快。     

基于超图模型的大规模门级网表层次化聚类算法

为了克服现有层次化方法通用性差、运算效率不高、电路结构提取不准等缺点,提出了一种基于超图模型的层次化聚类算法.首先对网表中最基本的迭代、总线、扇入和串联结构进行自动识别,然后将这4种基本结构按不同的组合方式进行多级聚类,最终建立起了网表的层次化结构.由于文中基本结构聚类算法是专门针对超图数据结构设计的,其时间复杂度较低.实验结果表明,该算法既可以得到较准确的层次信息,又能保证较高的运算速度,对各种应用均有较好的效果.     

LabVIEW在数字电路教学中的应用

根据LabVIEW的功能特点,提出了用LabVIEW对数字电路进行仿真教学.本文以74148集成8线-3线优先编码器为例分析了LabVIEW在数字电路教学中的应用,并完成了4线-2线、8线-3线、10线-4线普通编码器和优先编码器的设计,将各个编码器程序集成在一个主程序面板中,用数字显示的方式将结果显示出来.通过仿真验证其结果与实际元器件的功能完全相同,这样既丰富了教学方法和手段,又提高了教学质量,增强了学生学习的兴趣和积极性.     

Oriented energy,nearness and fault diagnosis

This paper describes why the k-dimension maximal oriented energy subspace of the measurable voltage-change matrix id the optimal feature to locate faults in a population of circuits. The paper elaborately designs a "nearness" concept, which is used to construct a fault candidate set in a small size, and proposes a maximal nearness criterion. On the basis of these, the paper presents a novel algorithm to efficiently improve the accuracy and speed of fault locating.     

Implementation of VLSI on Signal Processing-Based Digital Architecture Using AES Algorithm

Continuous improvements in very-large-scale integration (VLSI) technology and design software have significantly broadened the scope of digital signal processing (DSP) applications. The use of application-specific integrated circuits (ASICs) and programmable digital signal processors for many DSP applications have changed, even though new system implementations based on reconfigurable computing are becoming more complex. Adaptable platforms that combine hardware and software programmability efficiency are rapidly maturing with discrete wavelet transformation (DWT) and sophisticated computerized design techniques, which are much needed in today’s modern world. New research and commercial efforts to sustain power optimization, cost savings, and improved runtime effectiveness have been initiated as initial reconfigurable technologies have emerged. Hence, in this paper, it is proposed that the DWT method can be implemented on a field-programmable gate array in a digital architecture (FPGA-DA). We examined the effects of quantization on DWT performance in classification problems to demonstrate its reliability concerning fixed-point math implementations. The Advanced Encryption Standard (AES) algorithm for DWT learning used in this architecture is less responsive to resampling errors than the previously proposed solution in the literature using the artificial neural networks (ANN) method. By reducing hardware area by 57%, the proposed system has a higher throughput rate of 88.72%, reliability analysis of 95.5% compared to the other standard methods.     

二维任意形状寄生电阻电容的边界元计算

由于集成电路技术高速发展,精确提取任意形状寄生电阻电容变得十分重要,本文以直接边界元素法为基础,利用圆弧样条插值近似任意曲线边界,使插值曲线具有整体一阶连续性,并克服了大挠度与多值的困扰。在直线边界使用线性连续元,在曲线边界使用二次连续无。对两邻国为直线的角点,我们曾提出处理角点处存在多重法的导数的一种方法。这里,它被推广到角点邻边含曲线段的情形。数值结果表明模拟器是可行的。     

A fully differential transimpedance amplifier with integrated differential photodetector in standard CMOS process for optical communications and interconnects

A fully differential transimpedance amplifier (TIA) with integrated differential photodetector in standard CMOS technologies has been realized for optical receivers in optical communications and optical interconnects. And a novel, fully differential photodetector aiming to convert the incident light into a pair of fully differential photo-generated currents and ensure the differential symmetry on circuit configuration and model has also been proposed for the differential TIA to achieve the fully differentia...