光电双基区晶体管(PDUBAT)的器件模型

本文在考虑了晶体管的小注入效应和大注入效应以及基区宽变效应等因素后,首次用近似和简化的数学表示式和相应的等效电路,描述了光电双基区晶体管(PDUBAT)负阻形成的机理并使负阻区和谷值区的理论计算和实验结果一致性很好.     

Thermal stability of interfaces between metals and InP-based materials

The thermal stability of interfaces between metals (Ni, Pt, Ti, Mo) and III-V compound semiconductors has been investigated by the application of Rutherford backscattering spectrometry. Metal diffusion and interfacial lattice disorder of the semiconductors were analyzed for various metal/semiconductor samples annealed at temperatures up to 500°C. The interfaces of Ni/GaAs and Ti/GaAs were found to be more stable than those of Ni/In-based semiconductors and Ti/ In-based semiconductors, respectively. Faster diffusion of Pt atoms was ob-served in In-and As-containing materials than in P-containing materials. Mo/ semiconductor interfaces were the most stable.     

Effect of epitaxial realignment on the leakage behavior of arsenic-implanted,as-deposited polycrystalline Si-on-single crystal Si diodes

When dopants are indiffused from a heavily implanted polycrystalline silicon film deposited on a silicon substrate, high thermal budget annealing can cause the interfacial “native” oxide at the polycrystalline silicon-single crystal silicon interface to break up into oxide clusters, causing epitaxial realignment of the polycrystalline silicon layer with respect to the silicon substrate. Anomalous transient enhanced diffusion occurs during epitaxial realignment and this has adverse effects on the leakage characteristics of the shallow junctions formed in the silicon substrate using this technique. The degradation in the leakage current is mainly due to increased generation-recombination in the depletion region because of defect injection from the interface.     

Fast and Compact 16 by 16 Cellular Neural Network Implementation

The paper presents a Cellular Neural Network implementation based on a high gain sigmoid operation. The required simplifications to the original theory are described that allow the use of high gain. With this design black and white images can be processed. The basic building blocks in a cell are described. A 16×16 cells network has been designed and processed with 1.2 micron CMOS technology. Measurement results which show the operation of the network are presented.     

MOS功率驱动高速脉冲激光器的研究

运用经典电路理论,对MOS功率管的开关特性、驱动原理进行了分析,导出了应用MOS功率管实现高速大电流开关应遵从的原则和方法,并成功地实现了光脉冲上升时间小于5ns、下降时间小于10ns,驱动电流达10～50AP-P激光器电源的要求.     

全双极WTA模型的改进及其实现

提出了一种相似度的新定义，使双极ＷＡＴ模型的实现更加简洁明了。增加一个阈值使系统能判别非存储模式或因其信息量过低而无法鉴定的输入模式，阈值的大小与要求的容错能力有关。双极相似度及阈值通过光学方法实现。阈值的光学实现使系统仍具有照明不变性。通过电路实现取及ＷＴＡ网络的迭代运算。     

动态分频器技术

本文介绍了动态分频器的基本原理；详细叙述了动态分频器电路及其主要工艺技术；综述了国外动态分频器的发展动态。     

功率管焊接质量射线检测

介绍采用射线方法检测功率管芯片与基座之间的焊接质量。试验证明，选用合适的透照参数可使X射线照相和X射线实时成像对焊接部位的检测均得到较高的对比灵敏度，但X射线照相法成本低廉，一次可透照多个工件，效率高，为该功率管焊接质量的理想检测方法。     

宽带电流反馈运算放大器OPA623及其应用

以电流模技术和互补双极工艺制造的集成电路具有良好的高频性能，用其构成的电流反馈放大器频带宽，转换速率高，在视频和射频信号的放大和处理以及高速数字通信系统中都得到广泛的应用。通过OPA623集成“运放”，简要介绍电流反馈放大器的原理、性能及其在高清晰度电视及有线电视传输中的应用。     

Shorts in self-checking circuits

It has been noted by several authors that the classical stuck-at logical fault model might not be an appropriate representation of certain real failures occurring in integrated circuits. Shorts are an important class of such faults. This article gives a detailed analysis of the effects of shorts in self-checking circuits and proposes techniques for dealing with them. More precisely, we show that, unlike other faults such as stuck-at, stuck-on, and stuck-open—which produce only single errors in the place they occur—shorts can produce double errors on the two shorted lines. In particular, feedback shorts can produce double errors on the two shorted lines. The double error is unidirectional for some feedback shorts and non-unidirectional for some others. Furthermore, in some technologies (e.g., CMOS), non-feedback shorts can also produce double non-unidirectional errors. We also show that unlike stuck-at, stuck-on, and stuck-open faults, redundant shorts can destroy the SFS property. Then we propose several techniques for coping with these problems and we illustrate the results by circuit implementation examples.The present study is given for NMOS and CMOS circuits but we show that it is valid for any other technology.