Differences between oculomotor and perceptual artifacts for temporally limited head mounted displays

We used perceptual and oculomotor measures to understand the negative impacts of low (phantom array) and high (motion blur) duty cycles with a high‐speed, AR‐likehead‐mounted display prototype. We observed large intersubject variability for the detection of phantom array artifacts but a highly consistent and systematic effect on saccadic eye movement targeting during low duty cycle presentations. This adverse effect on saccade endpoints was also related to an increased error rate in a perceptual discrimination task, showing a direct effect of display duty cycle on the perceptual quality. For high duty cycles, the probability of detecting motion blur increased during head movements, and this effect was elevated at lower refresh rates. We did not find an impact of the temporal display characteristics on compensatory eye movements during head motion (e.g., VOR). Together, our results allow us to quantify the tradeoff of different negative spatiotemporal impacts of user movements and make subsequent recommendations for optimized temporal HMD parameters.     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

平面阵列波导光栅波导模式参量的分析

用周期波导的方法分析平面阵列波导光栅(AWG)的本征方程及波导模式参数,结果表明波导传播常数是带状分布的,与波导间隔有关。分析结果对器件的优化设计有一定的指导意义。     

一般阵列误差情况下信号二维方向角估计

针对均匀圆阵存在一般阵列误差的情况,提出一种信号二维方向角估计方法.基于均匀圆阵的阵列流形和阵列输出的协方差矩阵,采用加权总体最小二乘法估计信号二维方向角.并给出了解整周期性模糊的方法.计算机仿真表明了此方法估计精度高,对阵列误差鲁棒性强,并且各项性能都接近于CRB.     

Antenna-array pattern nulling using a differential evolution algorithm

A new method based on the differential evolution (DE) algorithm is proposed for antenna-array pattern synthesis with prescribed nulls. The array excitation amplitudes are the only controlling parameters, and the objectives are to synthesize array patterns with nulls imposed on directions of interferences while keeping the sidelobe levels (SLLs) below prescribed levels. Many factors such as the excitation dynamic range ratio, null depth level, null width, and SLLs are taken into account in the synthesis. Simulation results of several typical problems are compared with published results to illustrate the effectiveness of the proposed method. © 2003 Wiley Periodicals, Inc. Int J RF and Microwave CAE 14: 57–63, 2004.     

超高压大容量铝电解电容器的研制

分析了大功率设备用超高压大容量铝电解电容器的特点,通过研制工作电解液、制订制作工艺及零部件设计方案,研制出的超高压大容量铝电解电容器具有损耗角正切小(tgδ为0.25)、承受纹波电流能力强(100 Hz,2.12～27.8 A)及寿命长的特点,耐久性达到85℃,5 000 h。     

二单元DPCA在机载相控阵雷达AMTI中的应用

二单元偏置相位中心天线技术 (DPCA)在机载相控阵雷达自适应动目标指示 (AMTI)中占有重要地位 ,其原理在很多文献中都有讨论。文中主要提出了将二单元DPCA应用到机载相控阵雷达的具体方法和实验步骤 ,针对接收数据是M×N矩阵的情况 ,分析了数据降维变换的具体过程 ,并从仿真结果中得到有效性证明。该方法对DPCA在实际工程中的应用具有重要参考价值     

一种CMOS静态双沿顺序脉冲发生器的设计

提出一种基于CMOS技术的静态双沿顺序脉冲发生器结构。他是由以基于CMOS二选一选择器的电平型触发器构成的记忆单元和一个与门阵列组成的转译单元构成的。与门阵列的转译单元使顺序脉冲发生器在时钟上升沿和下降沿处均能输出移位脉冲,从而形成双沿触发的功能。仿真验证其功能正确,且根据分析该结构不仅能够节省芯片面积,还可以大大减小芯片的功耗。     

传感器管理及其在相控阵雷达中的应用

传感器管理是数据融合的一部分。介绍了传感器管理的概念和框架 ,概述了国内外传感器管理算法的研究现状。主要工作是针对相控阵雷达这一传感器 ,通过对其不同工作模式以及不同参数的管理 ,来说明传感器管理的原理。提出了一种新的自适应采样周期算法 ,仿真结果表明该算法的优越性     

智能天线对移动通信网性能的影响

智能天线是目前移动通信中的热点话题之一，也是提升网络容量和改善传输质量的关键技术。本文简要介绍了智能天线基本概念，原理及其在无线网络中的重大作用。