Dejittering in the transport of MPEG-2 and MPEG-4 video

When multimedia information is transported over a packet-switched network, the quality of presentation can be degraded due to network delay variation or jitter. This paper presents a dejittering scheme that can be used in the transport of MPEG-4 and MPEG-2 video to absorb any introduced network jitter, thus preserving the presentation quality of transported media streams. The dejittering scheme is based on the statistical approximation of delay variation in the arrival times of video packets carrying encoded clock reference values and a filtering and re-stamping mechanism. In addition, a brief overview of the MPEG-4 system is presented.     

配电房温湿度测控系统的设计

为了保证电气设备在配电房安全运行和防止小动物的破坏,设计了一个基于STC12C5412AD单片机作为控制器的温湿度测控系统;系统采用屏幕YM0009S液晶显示模块,实现了显示当前环境的温度和湿度、时钟的功能,还具有自动控制、手动控制和报警功能。利用CPU的ISP功能,实现系统软件升级和校准时钟等功能;实践表明,系统工作稳定,抗干扰能力强,具有良好的性能价格比和应用价值,并且对于其它领域的温湿度测控系统的设计也有着较高的参考价值。     

Influence of temperature on the liver circadian clock in the ruin lizard Podarcis sicula

Reptiles represent an interesting animal model to investigate the influence of temperature on molecular circadian clocks. The ruin lizard Podarcis sicula lives in a continental climate and it is subjected to wide range of environmental temperatures during the course of the year. As consequence, ruin lizard daily activity pattern includes either the hibernation or periods of inactivity determined by hypothermia. Here we showed the rhythmic expression of two clock genes, lPer2 and lClock, in the liver of active lizards exposed to summer photo-thermoperiodic conditions. Interestingly, the exposition of lizards to hypothermic conditions, typical of winter season, induced a strong dampening of clock genes mRNA rhythmicity with a coincident decrease of levels. We also examined the qualitative and quantitative distribution of lPER2 and lCLOCK protein in different cellular compartments during the 24-h cycle. In the liver of active lizards both proteins showed a rhythmic expression profile in all cellular compartments. After 3 days at 6 degrees C, some temporal fluctuations of the lCLOCK and lPER2 are still detectable, although, with some marked modifications in respect to the values detected in the liver of active lizards. Besides demonstrating the influence of low temperature on the lizard liver circadian oscillators, present results could provide new essential information for comparative studies on the influence of temperature on the circadian system across vertebrate classes.     

Mapping of user interfaces on electronic appliances

The purpose of this study was to investigate mapping of user interfaces on consumer electronic appliances. A digital clock with five different interface modes was chosen for the experiment. Forty elderly subjects (above 65 years) and 40 middle-aged subjects (45-64 years) participated in the study. Every subject had to complete three different tasks, namely time setting, alarm time setting and date setting. The researchers investigated what problems were encountered when performing these tasks and collected data such as operational time, the number of total inputs, subjective estimation and interview information. The findings of this study indicated that the interface modes had significant effects on operational time, the number of total inputs and subjective estimation. Finally, the study confirms that when the spatial relationship between buttons and display contents are clearly indicated, the operation is easier to complete.     

PLC与数字电子钟

在按时间控制的PLC控制系统中,正确处理定时是一个关键,本文介绍电子钟的显示数值范围、PLC控制的硬件接口及软件设计。     

正交调幅数字系统

文章分析了存在载波相位起伏、正弦干扰、高斯白噪声时正交调幅数字系统的抗扰性。结果表明,当接收载波相位起伏低于0.5度时,16QAM达最佳。     

容错单片机的同步设计

文中阐述了容错单片机同步问题的设计思想及设计方法,特别强调了设计中的几个主要的技术关键,给出了三模冗余时钟的实验电路,并简单直观地分析了容错单片机的可靠性。     

基于仿真方法的任务集可调度性判定工具

针对含有纯周期任务的任务集可调度性判定问题,提出一种基于仿真方法的任务集可调度性判定工具。通过设定时钟变量,模拟任务调度过程中的系统时钟,在时钟变量值增长的过程中,根据任务优先级从高到低的顺序,分析各个任务的截止时间限,判定任务集的可调度性。实例分析证明了该工具的可调度性判定结果正确。     

基于 DDWS 的复杂波形信号发生器实现

针对现有信号发生器具有的宽频带复杂波形合成能力弱、建立时间长的问题,提出了一种以软件无线电平台为基础、基于DDWS技术的实现方案。该方案采用高性能DDS单元实现捷变频时钟;采用大容量高速FPGA实现序列合成技术;采用嵌入式处理器实现基于素材波形的合成算法。实验结果表明,该方法波形建立速度较快,并有效提高了信号发生器的复杂波形和任意波形合成能力。     

一种能有效降低Memory BIST功耗的方法

随着系统芯片(SoC)上存储器比重的日趋增加和Memory BIST(memory built-inself-test)的广泛应用,对较低测试功耗的嵌入式Memory BIST的设计要求越来越高,因为测试功耗一般为系统正常工作时的两倍多,而过高的功耗会烧毁电路和降低芯片成品率.通过采用按时钟域划分存储器组和串并结合的方法来降低Memory BIST的测试功耗.实验仿真结果表明,用该方法所得的最大功耗只有传统方法的1/14,可见该方法能有效降低测试时的能量损耗.