变温辐照加速评估方法在不同工艺的NPN双极晶体管上的应用

对6种不同工艺的NPN双极晶体管进行了高、低剂量率及变温辐照的~(60)Coγ辐照实验。结果显示,6种工艺的NPN双极晶体管均有显著的低剂量率辐照损伤增强效应。而变温辐照损伤不仅明显高于室温高剂量率的辐照损伤,且能很好地模拟并保守地评估不同工艺的NPN双极晶体管低剂量率的辐照损伤。对实验现象的机理进行了分析。     

优先选用IGBT逆变焊机

从IGBT逆变焊机的IGBT器件的特点性质和价格、主电路的选取、磁性材料的特点、偏磁的危害、控制电路几方面,简要概述了国产逆变焊机的发展经历,指出逆变焊机的研制与推广应用是一个发生、发展和成熟的过程.随着研究的不断深入,逆变焊机的一系列关键技术问题已得到解决,并导致晶闸管逆变焊机即将退出市场,IGBT逆变焊机已成为用户的首选产品.逆变焊机取代传统焊机已成为必然趋势.     

Mixed P3HT/PCBM Organic Thin-Film Transistors： Relation between Morphology and Electrical Characteristics

The mixed P3HT （poly（3-hexylthiophene）） and [6,6]-PCBM （phenyl C61-butyric acid methyl ester） organic thin films were investigated for electronic structure using UV-Vis spectrophotometer and PESA （photo-electron spectroscopy in air）. Furthermore, ESR （electron spin resonance） and AFM （atomic force microscopy） were used to investigate the surface morphology and molecular orientation, respectively. ESR analysis indicated the molecular orientation of the P3HT crystalline in the blend thin films, which the crystalline oriented normal to the substrate with distribution of 35°. AFM images indicated that the surface morphology of P3HT film was affected by the presence of PCBM nanoparticles. Solution-processed OTFTs （organic thin-film transistors） based on P3HT/PCBM blend thin film in a top source-drain contact structure was fabricated, and the electrical characteristics of the devices were also investigated. A unipolar property with p-channel characteristics were obtained in glove box measurement.     

Parylene based bilayer flexible gate dielectric layer for top-gated organic field-effect transistors

In this paper, we report on a bilayer insulating film based on parylene-c for gate dielectric layers in top-gate/bottom-contact inkjet-printed organic field-effect transistors (OFETs) with indacenodithiophene-co-benzothiadiazole (IDTBT) and poly([N,N’-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5’-(2,2’-bitthiophene)) (P(NDI2OD-T2)) as with p- and n-channel semiconductors. The thin parylene-c film (t = 210 nm) show large gate leakage density (2.52 nA/cm² at 25 V) and low breakdown voltage (2.2 MV/cm). In addition, a degraded field-effect mobility (μ) was observed in printed IDTBT and P(NDI2OD-T2) OFETs with the parylene-c single-layered dielectric. X-ray photoelectron spectroscopy (XPS) analysis reveals that the degradation of μ is due to unwanted chemical interaction between parylene-c and the conjugated polymer surface during the parylene-c deposition process. By inserting 50-nm thick poly(methyl-methacrylate) (PMMA) and polystyrene (PS) layer in-between the parylene-c and conjugated polymer film, highly improved gate leakage density and breakdown voltage are achieved. The printed IDTBT and P(NDI2OD-T2) OFETs with a bilayer dielectric compose of parylene-c and PMMA and PS show significantly improved hole and electron μ of 0.47 cm²/Vs and 0.13 cm²/Vs, respectively, and better operation stability. In addition, we demonstrate inkjet-printed polymer complementary inverter with a high voltage gain of 25.7 by applying a PS/parylene-c bilayer dielectric.     

石墨烯电极有机薄膜晶体管研究

利用化学气相沉积法生长的高性能的层状石墨烯,通过转移和图案化后用作电极,制备了底接触的并五苯有机薄膜晶体管(OTFTs)。原子力显微镜观察发现,石墨烯电极的厚度比一般的金电极薄的多,所以石墨烯电极厚度对并五苯晶粒的生长影响不大。电学性能研究得到器件的输出和转移曲线、开关电流比、阈值电压、场效应迁移率。转移曲线的关态电流约为10-9 A,电流的开关比超过103。基于底接触的并五苯OTFTs的最大场效应迁移率约2×10-2 cm2.V-1.s-1。     

采用调制晶体管和双反馈回路的有源电感

在共源共栅-共漏有源电感的基础上,联合采用调制晶体管和双反馈回路,提出了一种可在不同频率下获得高的品质因子(Q)峰值,且分别可在大、小范围内粗调和细调电感值的新型宽频带可调谐有源电感。基于TSMC 0.18 μm CMOS工艺,利用ADS设计软件进行验证。结果表明,该有源电感在0~8.15 GHz的工作频率范围内,调节主回路的偏置电压,在频率为4.0,4.85,5.95 GHz时,分别获得1 154,6和1 293的高Q峰值。当Q值大于20时,其频率带宽均大于1.5 GHz,可以在43~132 nH之间粗调电感值的峰值。调节从回路的偏置电压,在5.95 GHz固定频率下,获得418~3 517的高Q峰值,且可以在10%比例范围内细调电感值的峰值。     

基于自组装工艺的ZnO纳米线网络晶体管

本文提出了一种,制备均匀高密度ZnO纳米线网络的简单高效的自组装方法。在此方法中,ZnO纳米线经3-氨丙基三乙氧基硅烷修饰后,其表面出现带正电的氨基功能团。经亲水性处理后的SiO2层在水中带负电,从而凭借静电吸引作用,修饰后的ZnO纳米线吸附在SiO2/Si基底,形成纳米线网络。利用此纳米线网络制备得场效应晶体管。纳米线密度为2.8/μm2的晶体管,其电流开关比为2.4×105,跨导为336 nS, 场效应迁移率为27.4 cm2/V?s.     

一种新型4H-SiC BJT结终端结构研究

设计了一种应用于4H-SiC BJT的新型结终端结构。该新型结终端结构通过对基区外围进行刻蚀形成单层刻蚀型外延终端,辅助耐压的p+环位于刻蚀型外延终端的表面,采用离子注入的方式,与基极接触的p+区同时形成。借助半导体数值分析软件SILVACO,对基区外围的刻蚀厚度和p+环的间距进行了优化。仿真分析结果表明,当刻蚀厚度为0.8μm,环间距分别为8,10和9μm时,能获得最高击穿电压。新结构与传统保护环(GR)和传统结终端外延(JTE)相比,BVCEO分别提高了34%和15%。利用该新型终端结构,得到共发射极电流增益β>47、共发射极击穿电压BVCEO为1 570V的4H-SiC BJT器件。     

The effect of porous structure of PMMA tunneling dielectric layer on the performance of nonvolatile floating-gate organic field-effect transistor memory devices

In this paper, we used the low and high density porous structure of polymethylmethacrylate (PMMA) film as tunneling dielectric layer in the floating-gate organic field-effect transistor (OFET) memory devices. Compared to the thin/thick nonporous structure of PMMA tunneling layer, the porous structure of PMMA tunneling layer had positive impacts on the device performance of the floating-gate OFET memory devices. Moreover, it was found that the memory performance was also increased as pore density of PMMA film increased. The atomic force microscopy (AFM) results of both porous structure of PMMA film and pentacene film on porous structure of PMMA film revealed that high density porous structure of PMMA tunneling layer can produce larger tunneling area and more electron transfer paths between pentacene film and PMMA film, which resulted in high electron capture and release efficiency of the floating-gate OFET memory devices with porous structure of PMMA tunneling layer. In addition, our porous structure of PMMA tunneling layer as well as nonporous PMMA film has high electrical insulating property due to their semi-hollow structure film, which is favourable to maintain stable retention property. Eventually, the floating-gate OFET memory devices with high density porous structure of PMMA tunneling layer showed good nonvolatile memory properties with a large memory window of about 43 V, a high ON/OFF current ratio of about 10⁴, and stable endurance and retention properties. Our results provided a new strategy to achieve the high performance floating-gate OFET memory devices.     

Characterization of developing source/drain current of carbon nanotube field-effect transistors with n-doping by polyethylene imine

An unsteady source/drain current induced by the source/drain bias of the n-type carbon nanotube field-effect transistors (n-CNTFETs), based on networked SWNTs, is reported. This current might affect the usual source/drain current regulated by the specified gate voltage and even overweighs the devices’ n-type characteristics. Through doping with polyethylene imine (PEI), the n-type devices here are made from the p-CNTFETs that were fabricated by printing interconnected CNTs between electrodes using the newly proposed laser transfer printing technique. To properly preserve the n-characteristics, devices with the PEI thickness less than 40 nm and with operating source/drain voltage below 0.5 V are recommended.