Comparison of different implementations of MFCC

The performance of the Mel-Frequency Cepstrum Coefficients (MFCC)may be affected by (1)the number of filters,(2)the shape of filters,(3)the way in which filters are spaced,and (4)the way in which the power spectrum is warped.In this paper,several comparison experiments are done to find a best implementation.The traditional MFCC calculation escludes the 0th coefficient for the reason that it is regarded as somewhat unrelable.According to the analysis and experiments.the authors find that it can be regarded as the generalized frequency band energy(FBE)and is hence useful,which results in the FBE-MFCC.The authors also propose a better analysis,namely the auto-regressive analysis.on the frame energy,which outperforms its 1st and /or 2nd order differential derivatives.Experiments with the “863“ Speech Database show that,compared with the traditional MFCC with its corresponding autoregressive analysis coefficinets.the FBE-MFCC and the frame energy with their corresponding auto-regressive analysis coefficients form the best combination,reducing the Chinese syllable error rate(CSER)by about 10%,while the FBE-MFCC with the corresponding auto-regressive analysis coefficients reduces CSER by 2.5%,Comparison experiments are also done with a quite casual Chinese speech database,named Chinese Annotated Spontaneous Speech(CASS) corpus.The FBE-MFCC can reduce the error rate by about 2.9% on an average.     

CMOS Analog Implementation of a Discrete-Time 9-Tap FIR Filter with Circular Buffer Architecture

This paper presents the design and simulation of a 9-Tap CMOS Analog Discrete-Time Finite Impulse Response (FIR) Filter system. This unique design features a Circular Buffer Architecture which achieves high sampling rate that can be easily expanded to improve speed and extended to higher order filters. Novel area-efficient four quadrant CMOS analog adder and multiplier circuits are employed to respond for high frequency and wide linear range inputs. The layout for all circuits has been realized using the design tool MAGIC with a 1.2 m CMOS process. The performance for each circuit and the whole system are characterized using HSPICE simulation based on the extracted MAGIC netlist. The 9-tap filter was designed to achieve 5 MHz sampling rate. The implemented design requires a total chip area of 1690.9 m by 2134.2 m and ±5 volt power supply.     

对称三进制光学加法器的进位直达通道设计

以对称三进制光学半加器为基础,提出了一个对称三进制光学全加器方案。主要介绍了进位直达并行通道在对称三进制光学全加器中的实现方案和工作原理,从而论证了实现对称三进制光学全加器的可行性。     

用于DDS系统相位累加器的加法器设计

直接数字频率合成器(DDS)具有频率转换时间短、分辨率高、输出相位连续等优点,是现代频率合成的重要技术之一。在分析了DDS基本原理的基础上,对DDS中的核心单元之一相位累加器进行了系统研究。分别利用镜像电路和超前进位全加器实现信号源累加器模块,进行模拟仿真并比较,结果表明镜像加法器在运算速度、版图布局上都优于超前进位加法器。     

性能改进的16位超前进位加法器

加法运算是最重要最基本的运算,所有的其他基本算术运算,减、乘、除、模乘运算最终都能归结为加法运算。在不同的场合使用的加法器对其要求也不同,有的要求速度更快,有的要求面积更小。基于速度更快的要求,对3种常用加法器从结构与性能上进行比较,给出了综合面积与速度的比较。进而对超前进位加法器进行了进一步改进,加入了流水线结构设计,大大提高了其速度性能。     

超超临界机组锅炉末级过热器爆管原因分析

通过化学成分分析、金相检验、力学性能测试等手段对某电厂超超临界锅炉末级过热器T91钢管爆裂原因进行了分析。结果表明:爆管系超温运行所致,过热导致钢管材料显微组织老化、力学性能显著下降;并根据现场情况对爆裂管的超温原因进行了分析,认为异物堵塞造成超温的可能性较大。     

Final Status of the Decommissioning of Research Reactors in Korea

A decommissioning project for the Korean Research Reactors KRR-1 and KRR-2 was started in 1997 and had been carried out with the goal of completion by the end of 2008. All the facilities were dismantled and the building surfaces decontaminated. The radioactive waste was packed into 200 liter drums and 4m³ containers and temporarily stored on site until their final disposal at the national repository facility. Some of the releasable waste was freely released and utilized for non-nuclear industries. The assessment of the residual radioactivity was carried out according to the Multi Agency Radiation Site Survey and Investigation Manual (MARSSIM), and accordingly, the safety of the site release was verified. The site and buildings will be cleared for reuse for non-nuclear purposes after a review of the assessment. In this paper, the final status of the decommissioning of research reactors in Korea including dismantlement processes, waste management, and a final assessment for unrestricted use of the site and buildings as the final goal of the decommissioning project will be described.     

蝶形运动估计算法及其VLSI实现

视频技术发展要求更高速,更利于硬件实现的运动估计算法.提出了一种蝶形运动估计算法,该算法采用蝶形搜索模板、快速截止技术和运动向量预测技术.该算法较钻石搜索算法提速43.26%-80%,并且图像质量更好.同时,本文采用加法树和片内并行存储器,构建该算法的VLSI实现结构.通过两种数据映射方法(拉丁方映射和4×4块映射),该结构不但解决了快速搜索算法的数据不规则性难题,并且节省了带宽.当系统时钟为27MHz,数据总线为16位,外部存储器带宽要求仅为4.57Mbit/s.比较其它硬件实现结构,该结构采用了更少的处理单元数,更小的缓存单元,但却获得更快的速度和更高的灵活性.     

河道截流工程的进展与研究

通过实例介绍国内河道截流工程采用的方法和进展。其中戗堤截流，包括立堵、平堵和平立堵结合，以及单戗堤、双戗堤进占等。８０年代以来，为了减少截流难度，多采用综合措施。此外，还介绍了长科院对葛洲坝等工程截流抛投块体的稳定研究，促进了抛石截流理论的发展。