弦乐合弦声信号时频特征的小波包分析

利用小波包分析技术对弦乐合弦声信号进行时频分析，并采用Hilbert变换对小波分解系数时域重构信号进行包络线检波，得到了合弦声信号幅值的时频等高线相平面图．与传统傅里叶谱分析技术相比较，小波变换的时频相平面图能同时反映合弦声信号的构成频率成分及其时域特征．     

信号肽引导源基因在昆虫表达系统中的分泌表达

将杆状病来源的gp67信号肽引导的慈姑蛋白酶抑制剂(API)基因与植物来源的慈姑蛋白酶抑制剂信号肽引导的慈姑蛋白抑制剂(API)基因，分别克隆到昆虫杆状病毒转载体pBacPAK8中，通过共转染将它们分别整合到昆虫病毒表达载体Bm—BacPAK6中，将获得的重组病毒CrBK—API2和CrBK—bpAPI4分别接种家蚕(Bombyx mori)细胞、家蚕幼虫及蛹体中，慈姑蛋白酶抑制剂得到了高效表达。从家蚕细胞的表达来看，外源表达产物大多存在于细胞外的上清液中；从家蚕幼虫体内表达来看，信号肽能引导外源基因高效表达，且表达产物的90％以上能分泌到细胞外；蛹体中的表达情况与幼虫中的相似，但表达产物出了不均一的现象，从表达产物的分子量测定来看，这两种信号肽在表达过程中都没有被切除。     

Buck调节器大信号稳定性分析方法探讨

本文以Buck调节器为例，对如何分析其出现的典型非线性大信号振荡现象作了一些有益的探索，以对电路的稳定性分析及工作机理有更好的理解。     

Signal flow graph modelling of interleaved buck converters

This paper presents a systematic development of unified signal flow graph model for an interleaved buck converter system operating in continuous inductor current mode. From this signal flow graph small, large‐signal and steady‐state models are developed, which are useful to study the converter dynamic and steady‐state behaviour. Converter performance expressions like steady‐state voltage gain, efficiency expressions and other small‐signal characteristic transfer functions are derived. Development of unified signal flow graph is explained for a 3‐cell interleaved converter system. Derivation of large, small‐signal and steady‐state models from the unified signal flow graph is demonstrated by considering a 2‐cell interleaved buck converter system. Large signal model was programmed in TUTSIM simulator, and the large‐signal responses against supply, load disturbances were predicted. Signal flow graph analysis results are validated with PSIM simulations. Further, the mathematical models obtained from the signal flow graph modelling are in agreement with those obtained from the state‐space averaging technique. Copyright © 2003 John Wiley & Sons, Ltd.     

计算机医用信号处理与分析——基于小波变换的医学瞬变信号去噪新方法

本文提出一种用于计算机辅助诊断前处理的医学信号去噪新方法。方法：１．对信号进行ＤＷＴ。２．在ｓ＝２１上，利用邻近尺度ＷＴ系数的空间相关性进行选择性去噪。３．在ｓ≥２２上，运用阈值法（Ｓｏｆｔ，ＨａｒｄＴｈｒｅｓｈｏｌｄｉｎｇ）去噪。４．信号重构。结果：分别采用本文方法及传统方法对突变信号进行去噪与结果比较。结论：本文方法在获得信噪比增益的同时，能够保持对信号突变信息的良好分辨且处理速度快、便于在微机上实现。     

混合信号处理器MSP58C80／MSP58C20及其应用

ＳＰ５８Ｃ８０／ＭＳＰ５８Ｃ２０混合信号处理器，具有Ｓｉｇｍａ－Ｄｅｌｔａ编码解码器（ＣＯＤＥＣ），内置掩模式编程只读存储器，具有４８ｋｂｐｓ压缩率，在外部微控制器（ＭＣＵ）驱动下，可完成信息的存储、速览、删除、重播等功能。本文对ＭＳＰ５８Ｃ８０／ＭＳＰ５８Ｃ２０的工作原理、特点及外部接口，控制和应用等作了详细的讨论。     

语音信号的预滤波和倒谱参数方差的统计

对于非实验室条件下的实时语音识别系统来说，能否准确提取出所需要的语音信号特征，是决定该识别系统正识率高低的关键因素之一，对语音信号进行预滤波以抑制噪音，有利于语音信号特征的提取，本文结合一个实际系统，讨论了其降噪问题，并建议以倒谱参数方差之统计特性是否符合一定规律的为标准，来衡量预滤波的效果，文中还对数字滤波器及随机低门限时域中心削波在预滤波中的作用进行了讨论，实验结果表明，预滤波取得了较好的效果     

BOAR: an advanced HW/SW coemulation environment for DSP system development

The BOAR emulation system is targeted to hardware/software (HW/SW) codevelopment of advanced embedded DSP and telecom systems. The challenge of the BOAR system is efficient customization of programmable hardware, and dedicated partitioning routine to target applications and structures, which allows quite high overall system performance. The system allows multiple configurations for communication between processors and field programmable gate arrays (FPGAs) making the BOAR system an efficient tool for real-time HW/SW coverification. The reprogrammable hardware of the emulation tool is based on four Xilinx 4000-series devices, two Texas TMS320C50 signal processors and one Motorola MC68302 microcontroller. With current devices the BOAR hardware provides approximately 40–70 kgates of logic capacity in DSP applications. The emulation capacity can be expanded by connecting several similar boards in chain. The system has also a versatile internal reprogrammable test environment for test bench development, performance evaluations and design debugging. The logic development environment is based on the Synopsys synthesis tools and an automatic design management software, which performs resource mapping and performance-driven design partitioning between FPGAs. The emulation hardware is currently connected to logic and software development environments via an RS-232C bus. The BOAR emulation system has been found a very efficient platform for real-life prototyping of different types of DSP algorithms and systems, and validating correct functionality of a VHDL macro library.     

一类不确定信号的跟踪问题及应用

将线性时不变系统跟踪外部Ｌ２有界不确定信号的问题，归为一类包含被跟踪信号动力学特性的广义对象的控制器设计问题，给出了分析求解过程。应用于速度伺服系统，仿真结果表明，系统具有良好的跟踪外部参考输入和抑制力矩扰动的特点，同时设计过程为模型匹配控制器的设计问题提供了一种方法。